Pehea e pale ai i ka hopena laina hoʻoili i PCB wikiwiki loa manao

1. Nā hana e kāohi ai i ka hoʻopili electromagnetic

ʻO kahi hopena maikaʻi i ka pilikia o ka hōʻailona pono e hoʻomaikaʻi i ka hoʻokae uila (EMC) o ka papa PCB. ʻO kekahi o nā mea nui e hōʻoia i ka papa maikaʻi ʻana o ka papa PCB. ʻO kahi papa hōʻailona me kahi papa honua kahi hana maikaʻi loa no ka hoʻolālā paʻakikī. Hoʻohui, hoʻoliʻiliʻi i ka nui o ka hōʻailona o ka papa waho loa o ka papa kaapuni kahi ala maikaʻi e hōʻemi ai i ka radiation electromagnetic. Hiki ke hoʻokō ʻia kēia ala ma ka hoʻohana ʻana i ka ʻenehana “ʻāpana o ka ʻilikai” i ka hoʻolālā PCB “build-up”. Loaʻa ka papa o ka ʻāpana i ka hoʻohui ʻana i kahi hui o nā papa hoʻoluʻu lahilahi a me nā micropores i hoʻohana ʻia e komo i kēia mau papa ma kahi PCB hana nui. Hiki ke kanu ʻia ke kūpaʻa a me ka capacitance ma lalo o ka ʻili, a aneane pālua ʻia ka nui o ka laina ma kēlā me kēia ʻāpana, no laila e hōʻemi ana i ka nui o ka PCB. ʻO ka hoʻemi ʻana o kahi o PCB kahi hopena nui i ka topology o ka hoʻokele, ʻo ia hoʻi ka hoʻemi ʻia o ka loop o kēia manawa, ua hoʻemi ʻia ka lōʻihi o ka hoʻokele lālā, a like ka uila electromagnetic ma kahi o ka loop o kēia manawa; At the same time, the small size characteristics mean that high-density pin packages can be used, which in turn reduces the length of the wire, thus reducing the current loop and improving emc characteristics.

2. Strictly control the cable lengths of key network cables

If the design has a high speed jump edge, the transmission line effect on the PCB must be considered. ʻOi aku ka nui o ka pilikia o ke kiʻekiʻena uaki kiʻekiʻe i hoʻopili ʻia i nā ʻāpana pōʻai puni honua i hoʻohana ʻia i kēia mau lā. Aia kekahi mau kumumanaʻo maʻamau e hoʻoponopono i kēia pilikia: inā hoʻohana ʻia nā kaapuni CMOS a i ʻole TTL no ka hoʻolālā, ʻoi aku ka liʻiliʻi o ke ana o ka hana ma mua o 10MHz, a ʻaʻole pono e ʻoi aku ka lōʻihi o ka uea ma mua o 7 ʻīniha. If the operating frequency is 50MHz, the cable length should not be greater than 1.5 inches. Wiring length should be 1 inch if operating frequency reaches or exceeds 75MHz. ʻO 0.3 iniha ka lōʻihi o ka uea ʻoi loa o nā uea GaAs. Inā uaʻoi aku kēia, aia kekahi pilikia laina hoʻoili.

3. Hoʻolālā kūpono i ka topology o cabling

Another way to solve the transmission line effect is to choose the correct routing path and terminal topology. ʻO ke topology cabling e pili ana i ke kaʻina cabling a me ke ʻano o ke kaula uila. Ke hoʻohana ʻia nā hāmeʻa loiloi wikiwiki, e hoʻopunipuni ʻia ka hōʻailona me nā lihi hoʻololi wikiwiki e nā lālā o ka pahu hōʻailona ke ʻole e mālama ʻia ka lōʻihi o ka lālā. Ma ka laulaha, apono ʻo PCB ma hope i ʻelua mau kumuhana topologies, ʻo ia hoʻi ʻo Daisy Chain e hoʻohele ana a me ka hoʻohele Star.

No ka uwea daisy-kaulahao, hoʻomaka ka uwea ma ka hopena o ka mea hoʻokele a hōʻea i kēlā me kēia loaʻa ʻana i ka hopena. Inā hoʻohana ʻia kahi pale pale moʻo e hoʻololi i nā ʻano hōʻailona, ​​pono ke kūlana o ka resistor moʻo i ka hope o ka hoʻokele. ʻO ke kaulahao kaulahao ʻo Daisy ka mea ʻoi loa i ka kaohi ʻana i ka interruptic kiʻekiʻe o ka cabling. Eia nō naʻe, ʻo kēia ʻano uea ka hapa haʻahaʻa o ka hoʻoili a ʻaʻole maʻalahi e hala 100%. I ka hoʻolālā maoli, makemake mākou e hana i ka lōʻihi o ka lālā i ke kaulahao kaulahao Daisy i ka pōkole e like me ka hiki, a ʻo ka lōʻihi o ka lōʻihi e palekana: = Trt * 0.1.

ʻO kahi laʻana, hoʻopau nā lālā i nā kaapuni ʻo TTL wikiwiki wikiwiki ma lalo o 1.5 ʻīniha ka lōʻihi. Lawe kēia topology i ka liʻiliʻi o ka lewa uila a hiki ke hoʻopau ʻia e kahi pale pale hoʻokahi. Eia nō naʻe, hana kēia ʻano uila i ka hōʻailona e loaʻa ana i nā mea hōʻailona hōʻailona ʻokoʻa ʻole.

The star topology can effectively avoid the problem of clock signal synchronization, but it is very difficult to finish the wiring manually on the PCB with high density. ʻO ka hoʻohana ʻana i ka cabler akomi ke ala ʻoi loa e hoʻopau ai i ka cabling hōkū. A terminal resistor is required on each branch. The value of the terminal resistance should match the characteristic impedance of the wire. Hiki i kēia ke hana lima a i ʻole ma o nā pono hana CAD e helu ai i ke ʻano impedance waiwai a me nā palena kūlike e kū like ana.

While simple terminal resistors are used in the two examples above, a more complex matching terminal is optional in practice. ʻO ka koho mua ke kahua hoʻokūkū hoʻokūkū RC. Hiki i nā pahu kaulike RC ke hoʻēmi i ka hoʻohana mana, akā hiki ke hoʻohana wale ʻia ke kūpaʻa ka hana hōʻailona. Kūpono loa kēia hana no ka hana ʻana i ka hōʻailona uaki laina. ʻO ka hemahema ka capacitance i ka RC match terminal i ka hopena a me ka wikiwiki o ka hōʻailona.

The series resistor matching terminal incurs no additional power consumption, but slows down signal transmission. This approach is used in bus-driven circuits where time delays are not significant. Loaʻa i ka moʻo resistor kūlike terminal ka lanakila o ka hōʻemi ʻana i ka helu o nā hāmeʻa i hoʻohana ʻia ma ka papa a me ke kiʻiona o nā pilina.

The final method is to separate the matching terminal, in which the matching element needs to be placed near the receiving end. ʻO kona maikaʻi ʻaʻole ia e huki i lalo i ka hōʻailona, ​​a hiki ke maikaʻi loa e hōʻalo i ka walaʻau. Hoʻohana maʻamau no nā hōʻailona hoʻokomo TTL (ACT, HCT, FAST).

In addition, the package type and installation type of the terminal matching resistor must be considered. SMD surface mount resistors generally have lower inductance than through-hole components, so SMD package components are preferred. There are also two installation modes for ordinary straight plug resistors: vertical and horizontal.

I ke ʻano hoʻonohonoho hoʻonohonoho, he pin pōkole kuʻina ko ke kūʻē, kahi e hoʻēmi ai i ke kūmau wela ma waena o ke kūʻē ʻana a me ka papa kaapuni a hoʻolilo maʻalahi ʻia i ka wela i ke ea. Akā ʻo ka hoʻonohonoho hoʻonohonoho lōʻihi e hoʻonui i ka inductance o ka resistor. Hoʻokomo haʻahaʻa ka hoʻouka papamoe ma muli o ka hoʻonoho haʻahaʻa. However, the overheated resistance will drift, and in the worst case, the resistance will become open, resulting in PCB wiring termination matching failure, becoming a potential failure factor.

4. Nā ʻenehana pili pono ʻē aʻe

I mea e hōʻemi ai i ka overshoot uila ma ka lako mana IC, pono e hoʻohui i ka capacitor decoupling i ka puʻupuʻu IC. Lawe maikaʻi kēia i ka hopena o nā burrs i ka lako mana a hoʻemi i ka radiation mai ka mana loop ma ka papa paʻi.

ʻOi aku ka maikaʻi o ka hopena hoʻomālamalama burr ke hoʻopili pololei ʻia ka capacitor decoupling i ka wāwae lako mana o ka pōʻaiapuni hoʻohui ʻia ma mua o ka papa mana lako. ʻO kēia ke kumu i loaʻa ai i kekahi mau hāmeʻa nā capacitor decoupling i loko o kā lākou kumu, ʻoiai ʻo kekahi e koi i ka mamao ma waena o ka capacitor decoupling a me ka hāmeʻa e liʻiliʻi ka lawa.

Pono e hoʻonohonoho pū ʻia nā wikiwiki a me nā pono hana mana kiʻekiʻe a hiki i ka hiki ke hōʻemi i ka overhoot transient o ka uila uila.

Me ka ʻole o ka papa mana, hana nā laina uila lōʻihi i kahi loop ma waena o ka hōʻailona a me ka loop, e lawelawe ana ma ke ʻano he kumu radiation a me ka pōʻaiapuni inductive.

ʻO ke kāpili e hana ana i kahi loop e hele ʻole ma waena o ke kaula pūnaewele like a i ʻole ke kapa ʻia e kapa ʻia ʻo loop loop. Inā hele ka loop i loko o ke kaula pūnaewele like, hana nā ala ʻē aʻe i kahi loop loop. I nā kūlana ʻelua, hiki ke hopena i ka hopena antenna (antena laina a me ke aniani apo).