In design, layout is an important part. The quality of the layout result will directly affect the effect of the wiring, so it can be considered that a reasonable layout is the first step to a successful PCB design. Especially the pre-layout is the process of thinking about the entire circuit board, signal flow, heat dissipation, structure and other structures. If the pre-layout fails, no amount of effort will be needed.

PCB layout design The design process flow of printed circuit boards includes schematic design, electronic component database registration, design preparation, block division, electronic component configuration, configuration confirmation, wiring and final inspection. In the process of the process, no matter which process is found to be a problem, it must be returned to the previous process for reconfirmation or correction.

이 기사에서는 먼저 PCB 레이아웃 설계 규칙 및 기술을 소개한 다음 레이아웃의 DFM 요구 사항, 열 설계 요구 사항, 신호 무결성 요구 사항, EMC 요구 사항, 레이어 설정 및 전원 접지 분할 요구 사항에서 PCB 레이아웃을 설계 및 검사하는 방법을 설명합니다. 전원 모듈. 요구 사항 및 기타 측면을 자세히 분석하고 편집자를 따라 세부 사항을 찾습니다.

PCB layout design rules

1. Under normal circumstances, all components should be arranged on the same surface of the circuit board. Only when the top-level components are too dense, can some devices with limited height and low heat generation, such as chip resistors, chip capacitors, and chip capacitors, be installed. Chip IC, etc. are placed on the lower layer.

2. 전기적 성능 확보를 전제로 구성 요소를 그리드에 배치하고 서로 평행 또는 수직으로 배치하여 깔끔하고 아름답게 해야 합니다. 정상적인 상황에서 구성 요소는 겹치는 것이 허용되지 않습니다. 구성 요소의 배열은 간결해야 하며 구성 요소는 전체 레이아웃에 배열되어야 합니다. 분포가 균일하고 조밀합니다.

3. The minimum distance between adjacent land patterns of different components on the circuit board should be above 1mm.

4. The distance from the edge of the circuit board is generally not less than 2MM. The best shape of the circuit board is rectangular, and the aspect ratio is 3:2 or 4:3. When the size of the circuit board is larger than 200MM by 150MM, consider what the circuit board can withstand Mechanical strength.

PCB layout design skills

PCB의 레이아웃 설계에서는 회로 기판의 단위를 분석해야 하며 레이아웃 설계는 시작 기능을 기반으로 해야 합니다. 회로의 모든 구성 요소를 배치할 때 다음 원칙을 충족해야 합니다.

1. 각 기능회로부의 위치를 ​​회로의 흐름에 따라 배치하여 레이아웃이 신호순환에 편리하고 신호가 최대한 같은 방향으로 유지되도록 한다[1].

2. Take the core components of each functional unit as the center and lay out around him. The components should be uniformly, integrally and compactly arranged on the PCB to minimize and shorten the leads and connections between the components.

3. For circuits operating at high frequencies, the distribution parameters between components must be considered. In general circuits, components should be arranged in parallel as much as possible, which is not only beautiful, but also easy to install and easy to mass produce.

PCB 레이아웃을 설계하고 검사하는 방법

1. DFM requirements for layout

1. The optimal process route has been determined, and all devices have been placed on the board.

2. The origin of the coordinates is the intersection of the left and lower extension lines of the board frame, or the lower left pad of the lower left socket.

3. The actual size of the PCB, the location of the positioning device, etc. are consistent with the process structure element map, and the device layout of the area with restricted device height requirements meets the requirements of the structure element map.

4. 다이얼 스위치, 리셋 장치, 표시등 등의 위치가 적절하고 핸들 바가 주변 장치에 간섭하지 않습니다.

5. 보드의 외부 프레임은 197mil의 부드러운 라디안을 가지거나 구조적 크기 도면에 따라 설계되었습니다.

6. Ordinary boards have 200mil process edges; the left and right sides of the backplane have process edges greater than 400mil, and the upper and lower sides have process edges greater than 680mil. The device placement does not conflict with the window opening position.

7. All kinds of additional holes (ICT positioning hole 125mil, handle bar hole, elliptical hole and fiber holder hole) that need to be added are all missing and set correctly.

8. The device pin pitch, device direction, device pitch, device library, etc. that have been processed by wave soldering take into account the requirements of wave soldering.

9. The device layout spacing meets the assembly requirements: surface mount devices are greater than 20mil, IC is greater than 80mil, and BGA is greater than 200mil.

10. 압착 부품은 부품 표면 거리가 120mils 이상이고 용접 표면의 압착 부품 관통 영역에는 장치가 없습니다.

11. 키가 큰 장치 사이에는 단락 장치가 없으며 높이가 5mm 이상인 장치 사이에는 패치 장치와 짧고 작은 삽입 장치가 10mm 이내에 배치되지 않습니다.

12. Polar devices have polarity silkscreen logos. The X and Y directions of the same type of polarized plug-in components are the same.

13. All devices are clearly marked, no P*, REF, etc. are not clearly marked.

14. There are 3 positioning cursors on the surface containing SMD devices, which are placed in an “L” shape. The distance between the center of the positioning cursor and the edge of the board is greater than 240 mils.

15. 보딩가공이 필요한 경우, 레이아웃을 고려하여 보딩과 PCB가공 및 조립이 용이합니다.

16. The chipped edges (abnormal edges) should be filled in by means of milling grooves and stamp holes. The stamp hole is a non-metallized void, generally 40 mils in diameter and 16 mils from the edge.

17. The test points used for debugging have been added in the schematic diagram, and they are placed appropriately in the layout.

Second, the thermal design requirements of the layout

1. Heating components and exposed components of the casing are not in close proximity to wires and heat-sensitive components, and other components should also be properly kept away.

2. The placement of the radiator takes into account the convection problem, and there is no interference of high components in the projection area of ​​the radiator, and the range is marked on the mounting surface with silk screen.

3. 레이아웃은 합리적이고 부드러운 방열 채널을 고려합니다.

4. 전해콘덴서는 고열기기와 적절히 분리되어야 합니다.

5. 고전력 장치 및 거싯 아래 장치의 방열을 고려하십시오.

Third, the signal integrity requirements of the layout

1. The start-end matching is close to the sending device, and the end matching is close to the receiving device.

2. Place decoupling capacitors close to related devices

3. Place crystals, crystal oscillators and clock drive chips close to related devices.

4. High-speed and low-speed, digital and analog are arranged separately according to modules.

5. Determine the topological structure of the bus based on the analysis and simulation results or the existing experience to ensure that the system requirements are met.

6. If it is to modify the board design, simulate the signal integrity problem reflected in the test report and give a solution.

7. The layout of the synchronous clock bus system meets the timing requirements.

네, EMC 요구 사항

1. Inductive devices that are prone to magnetic field coupling, such as inductors, relays, and transformers, should not be placed close to each other. When there are multiple inductance coils, the direction is vertical and they are not coupled.

2. 단판의 용접면에 있는 장치와 인접한 단판 사이의 전자기 간섭을 피하기 위해 단판의 용접면에 민감한 장치와 강한 방사 장치를 두어서는 안 됩니다.

3. The interface components are placed close to the edge of the board, and appropriate EMC protection measures have been taken (such as shielding shells, hollowing out of the power supply ground, etc.) to improve the EMC capability of the design.

4. The protection circuit is placed near the interface circuit, following the principle of first protection and then filtering.

5. The distance from the shielding body and the shielding shell to the shielding body and shielding cover shell is more than 500 mils for the devices with high transmitting power or particularly sensitive (such as crystal oscillators, crystals, etc.).

6. A 0.1uF capacitor is placed near the reset line of the reset switch to keep the reset device and reset signal away from other strong devices and signals.

Five, layer setting and power supply and ground division requirements

1. 두 개의 신호 레이어가 서로 직접 인접해 있는 경우 수직 배선 규칙을 정의해야 합니다.

2. The main power layer is adjacent to its corresponding ground layer as much as possible, and the power layer meets the 20H rule.

3. Each wiring layer has a complete reference plane.

4. 다층기판을 적층하고 코어재(CORE)를 대칭으로 동피밀도의 불균일한 분포와 매질의 비대칭 두께로 인한 뒤틀림을 방지합니다.

5. 보드의 두께는 4.5mm를 초과해서는 안됩니다. 두께가 2.5mm 이상(백플레인이 3mm 이상)인 경우에는 기술자가 PCB 가공, 조립, 장비에 문제가 없는지 확인하고 PCB 기판의 두께는 1.6mm로 하여야 합니다.

6. Via의 두께 대 직경 비율이 10:1보다 크면 PCB 제조업체에서 확인합니다.

7. The power and ground of the optical module are separated from other power and ground to reduce interference.

8. The power and ground processing of key components meet the requirements.

9. When impedance control is required, the layer setting parameters meet the requirements.

Six, power module requirements

1. The layout of the power supply part ensures that the input and output lines are smooth and do not cross.

2. 싱글 보드가 서브 보드에 전원을 공급할 때, 해당 필터 회로를 싱글 보드의 전원 콘센트와 서브 보드의 전원 입구 근처에 배치합니다.

Seven, other requirements

1. The layout takes into account the overall smoothness of the wiring, and the main data flow is reasonable.

2. 레이아웃을 최적화하기 위해 레이아웃 결과에 따라 제외, FPGA, EPLD, 버스 드라이버 및 기타 장치의 핀 할당을 조정합니다.

3. 레이아웃은 라우팅할 수 없는 상황을 피하기 위해 조밀한 배선에서 공간의 적절한 증가를 고려합니다.

4. 특수재료, 특수소자(0.5mmBGA 등), 특수공정 등을 채택하는 경우 납기 및 가공성을 충분히 고려하여 PCB 제조사 및 공정담당자로부터 확인을 받습니다.

5. The pin corresponding relationship of the gusset connector has been confirmed to prevent the direction and orientation of the gusset connector from being reversed.

6. If there are ICT test requirements, consider the feasibility of adding ICT test points during layout, so as to avoid difficulty in adding test points during the wiring phase.

7. When a high-speed optical module is included, the layout of the optical port transceiver circuit is prioritized.

8. After the layout is completed, a 1:1 assembly drawing has been provided for the project personnel to check whether the device package selection is correct against the device entity.

9. At the opening of the window, the inner plane has been considered to be retracted, and a suitable wiring prohibition area has been set.