Kif tiddisinja l-elementi tal-vista tal-pcb?

In design, layout is an important part. The quality of the layout result will directly affect the effect of the wiring, so it can be considered that a reasonable layout is the first step to a successful PCB design. Especially the pre-layout is the process of thinking about the entire circuit board, signal flow, heat dissipation, structure and other structures. If the pre-layout fails, no amount of effort will be needed.

ipcb

PCB layout design The design process flow of printed circuit boards includes schematic design, electronic component database registration, design preparation, block division, electronic component configuration, configuration confirmation, wiring and final inspection. In the process of the process, no matter which process is found to be a problem, it must be returned to the previous process for reconfirmation or correction.

Dan l-artikolu l-ewwel jintroduċi r-regoli u t-tekniki tad-disinn tat-tqassim tal-PCB, u mbagħad jispjega kif tiddisinja u tispezzjona t-tqassim tal-PCB, mir-rekwiżiti DFM tat-tqassim, rekwiżiti tad-disinn termali, rekwiżiti tal-integrità tas-sinjal, rekwiżiti EMC, settings tas-saff u rekwiżiti tad-diviżjoni tal-art tal-enerġija, u moduli tal-enerġija. Ir-rekwiżiti u aspetti oħra se jiġu analizzati fid-dettall, u segwi l-editur biex issir taf id-dettalji.

Regoli tad-disinn tat-tqassim tal-PCB

1. Taħt ċirkostanzi normali, il-komponenti kollha għandhom ikunu rranġati fuq l-istess wiċċ tal-bord taċ-ċirkwit. Huwa biss meta l-komponenti ta ‘l-ogħla livell ikunu densi wisq, jistgħu jiġu installati xi apparati b’għoli limitat u ġenerazzjoni ta’ sħana baxxa, bħal resistors taċ-ċippa, capacitors taċ-ċippa u capacitors taċ-ċippa. Chip IC, eċċ huma mqiegħda fuq is-saff t’isfel.

2. Taħt il-premessa li tiġi żgurata l-prestazzjoni elettrika, il-komponenti għandhom jitqiegħdu fuq il-gradilja u rranġati paralleli jew perpendikolari għal xulxin sabiex ikunu puliti u sbieħ. Taħt ċirkostanzi normali, il-komponenti ma jitħallewx jikkoinċidu; l-arranġament tal-komponenti għandu jkun kompatt, u l-komponenti għandhom jiġu rranġati fuq it-tqassim kollu. Id-distribuzzjoni hija uniformi u densa.

3. The minimum distance between adjacent land patterns of different components on the circuit board should be above 1mm.

4. Id-distanza mit-tarf tal-bord taċ-ċirkwit hija ġeneralment mhux inqas minn 2MM. L-aħjar forma tal-bord taċ-ċirkwit hija rettangolari, u l-proporzjon tal-aspett huwa 3:2 jew 4:3. Meta d-daqs tal-bord taċ-ċirkwit ikun akbar minn 200MM b’150MM, ikkunsidra dak li l-bord taċ-ċirkwit jista ‘jiflaħ is-saħħa Mekkanika.

PCB layout design skills

Fid-disinn tat-tqassim tal-PCB, l-unitajiet tal-bord taċ-ċirkwit għandhom jiġu analizzati, u d-disinn tat-tqassim għandu jkun ibbażat fuq il-funzjoni tal-bidu. Meta jiġu stabbiliti l-komponenti kollha taċ-ċirkwit, għandhom jintlaħqu l-prinċipji li ġejjin:

1. Irranġa l-pożizzjoni ta ‘kull unità taċ-ċirkwit funzjonali skont il-fluss taċ-ċirkwit, sabiex it-tqassim ikun konvenjenti għaċ-ċirkolazzjoni tas-sinjal, u s-sinjal jinżamm fl-istess direzzjoni kemm jista’ jkun [1].

2. Take the core components of each functional unit as the center and lay out around him. The components should be uniformly, integrally and compactly arranged on the PCB to minimize and shorten the leads and connections between the components.

3. Għal ċirkwiti li joperaw fi frekwenzi għoljin, għandhom jitqiesu l-parametri tad-distribuzzjoni bejn il-komponenti. F’ċirkwiti ġenerali, il-komponenti għandhom ikunu rranġati b’mod parallel kemm jista ‘jkun, li mhux biss huwa sabiħ, iżda wkoll faċli biex tinstalla u faċli biex tipproduċi bil-massa.

Kif tiddisinja u tispezzjona t-tqassim tal-PCB

1. DFM requirements for layout

1. The optimal process route has been determined, and all devices have been placed on the board.

2. The origin of the coordinates is the intersection of the left and lower extension lines of the board frame, or the lower left pad of the lower left socket.

3. The actual size of the PCB, the location of the positioning device, etc. are consistent with the process structure element map, and the device layout of the area with restricted device height requirements meets the requirements of the structure element map.

4. Il-pożizzjoni tal-iswiċċ tal-arloġġ, apparat ta ‘reset, dawl indikatur, eċċ. hija xierqa, u l-manku ma jinterferixxix mal-apparat tal-madwar.

5. Il-qafas ta ‘barra tal-bord għandu radian bla xkiel ta’ 197mil, jew huwa ddisinjat skont it-tpinġija tad-daqs strutturali.

6. Bordijiet ordinarji għandhom truf tal-proċess ta ‘200mil; in-naħat tax-xellug u tal-lemin tal-backplane għandhom truf tal-proċess akbar minn 400mil, u n-naħat ta ‘fuq u t’isfel għandhom truf tal-proċess akbar minn 680mil. It-tqegħid tal-apparat ma jkunx f’kunflitt mal-pożizzjoni tal-ftuħ tat-tieqa.

7. All kinds of additional holes (ICT positioning hole 125mil, handle bar hole, elliptical hole and fiber holder hole) that need to be added are all missing and set correctly.

8. Iż-żift tal-pin tal-apparat, id-direzzjoni tal-apparat, il-pitch tal-apparat, il-librerija tal-apparat, eċċ li ġew ipproċessati bl-issaldjar tal-mewġ iqisu r-rekwiżiti tal-issaldjar tal-mewġ.

9. The device layout spacing meets the assembly requirements: surface mount devices are greater than 20mil, IC is greater than 80mil, and BGA is greater than 200mil.

10. Il-partijiet tal-crimping għandhom aktar minn 120 mils fid-distanza tal-wiċċ tal-komponent, u m’hemm l-ebda apparat fiż-żona ta ‘passaġġ tal-partijiet tal-crimping fuq il-wiċċ tal-iwweldjar.

11. M’hemm l-ebda apparat qasir bejn apparati għoljin, u l-ebda apparat ta ‘garża u apparat ta’ interpożizzjoni qasir u żgħir jitqiegħed f’5mm bejn apparati b’għoli akbar minn 10mm.

12. L-apparati polari għandhom logos tal-ħarir tal-polarità. Id-direzzjonijiet X u Y tal-istess tip ta ‘komponenti plug-in polarizzati huma l-istess.

13. All devices are clearly marked, no P*, REF, etc. are not clearly marked.

14. Hemm 3 cursors ta ‘pożizzjonament fuq il-wiċċ li fihom apparati SMD, li huma mqiegħda f’forma “L”. Id-distanza bejn iċ-ċentru tal-cursor tal-pożizzjonament u t-tarf tal-bord hija akbar minn 240 mils.

15. Jekk għandek bżonn tagħmel l-ipproċessar tal-imbark, it-tqassim huwa kkunsidrat li jiffaċilita l-imbark u l-ipproċessar u l-assemblaġġ tal-PCB.

16. It-truf imlaqqax (truf mhux normali) għandhom jimtlew permezz ta ‘skanalaturi tat-tħin u toqob tat-timbru. It-toqba tat-timbru hija vojt mhux metallizzat, ġeneralment b’dijametru ta ’40 mil u 16 mil mit-tarf.

17. The test points used for debugging have been added in the schematic diagram, and they are placed appropriately in the layout.

Second, the thermal design requirements of the layout

1. Heating components and exposed components of the casing are not in close proximity to wires and heat-sensitive components, and other components should also be properly kept away.

2. The placement of the radiator takes into account the convection problem, and there is no interference of high components in the projection area of ​​the radiator, and the range is marked on the mounting surface with silk screen.

3. It-tqassim iqis il-kanali ta ‘dissipazzjoni tas-sħana raġonevoli u bla xkiel.

4. Il-kapaċitatur elettrolitiku għandu jkun separat sew mill-apparat ta ‘sħana għolja.

5. Ikkunsidra d-dissipazzjoni tas-sħana ta ‘apparati u apparati ta’ qawwa għolja taħt il-gusset.

It-tielet, ir-rekwiżiti ta ‘integrità tas-sinjal tat-tqassim

1. The start-end matching is close to the sending device, and the end matching is close to the receiving device.

2. Place decoupling capacitors close to related devices

3. Place crystals, crystal oscillators and clock drive chips close to related devices.

4. Veloċità għolja u veloċità baxxa, diġitali u analoga huma rranġati separatament skond il-moduli.

5. Determine the topological structure of the bus based on the analysis and simulation results or the existing experience to ensure that the system requirements are met.

6. If it is to modify the board design, simulate the signal integrity problem reflected in the test report and give a solution.

7. The layout of the synchronous clock bus system meets the timing requirements.

Erba ‘, rekwiżiti EMC

1. Inductive devices that are prone to magnetic field coupling, such as inductors, relays, and transformers, should not be placed close to each other. When there are multiple inductance coils, the direction is vertical and they are not coupled.

2. Sabiex tiġi evitata interferenza elettromanjetika bejn l-apparat fuq il-wiċċ tal-iwweldjar tal-bord wieħed u l-bord wieħed li jmissu magħhom, l-ebda apparat sensittiv u apparat ta ‘radjazzjoni qawwija m’għandu jitqiegħed fuq il-wiċċ tal-iwweldjar tal-bord wieħed.

3. The interface components are placed close to the edge of the board, and appropriate EMC protection measures have been taken (such as shielding shells, hollowing out of the power supply ground, etc.) to improve the EMC capability of the design.

4. Iċ-ċirkwit tal-protezzjoni jitqiegħed ħdejn iċ-ċirkwit tal-interface, wara l-prinċipju tal-ewwel protezzjoni u mbagħad iffiltrar.

5. Id-distanza mill-korp tal-ilqugħ u l-qoxra tal-ilqugħ għall-korp tal-ilqugħ u l-qoxra tal-kopertura tal-ilqugħ hija aktar minn 500 mils għall-apparati b’qawwa ta ‘trasmissjoni għolja jew partikolarment sensittivi (bħal oxxillaturi tal-kristall, kristalli, eċċ.).

6. A 0.1uF capacitor is placed near the reset line of the reset switch to keep the reset device and reset signal away from other strong devices and signals.

Five, layer setting and power supply and ground division requirements

1. Meta żewġ saffi tas-sinjali jkunu direttament ħdejn xulxin, għandhom jiġu definiti regoli tal-wajers vertikali.

2. Is-saff tal-qawwa prinċipali huwa ħdejn is-saff tal-art korrispondenti tiegħu kemm jista ‘jkun, u s-saff tal-qawwa jilħaq ir-regola 20H.

3. Each wiring layer has a complete reference plane.

4. Bordijiet b’ħafna saffi huma laminati u l-materjal tal-qalba (CORE) huwa simetriku biex jipprevjeni t-tgħawwiġ ikkawżat minn distribuzzjoni irregolari tad-densità tal-ġilda tar-ram u ħxuna asimmetrika tal-medju.

5. Il-ħxuna tal-bord m’għandhiex taqbeż 4.5mm. Għal dawk bi ħxuna akbar minn 2.5mm (backplane akbar minn 3mm), it-tekniċi kellhom ikkonfermaw li m’hemm l-ebda problema bl-ipproċessar, l-assemblaġġ u t-tagħmir tal-PCB, u l-ħxuna tal-bord tal-karta tal-PC hija ta ‘1.6mm.

6. Meta l-proporzjon tal-ħxuna għad-dijametru tal-via jkun akbar minn 10:1, ikun ikkonfermat mill-manifattur tal-PCB.

7. The power and ground of the optical module are separated from other power and ground to reduce interference.

8. Il-qawwa u l-ipproċessar tal-art tal-komponenti ewlenin jissodisfaw ir-rekwiżiti.

9. Meta jkun meħtieġ kontroll tal-impedenza, il-parametri tal-issettjar tas-saff jissodisfaw ir-rekwiżiti.

Six, power module requirements

1. The layout of the power supply part ensures that the input and output lines are smooth and do not cross.

2. Meta l-bord wieħed iforni l-enerġija lis-subbord, poġġi ċ-ċirkwit tal-filtru korrispondenti ħdejn il-ħruġ tal-enerġija tal-bord wieħed u d-daħla tal-enerġija tas-subbord.

Seven, other requirements

1. The layout takes into account the overall smoothness of the wiring, and the main data flow is reasonable.

2. Aġġusta l-assenjazzjonijiet tal-pin tal-esklużjoni, FPGA, EPLD, xufier tax-xarabank u apparat ieħor skont ir-riżultati tat-tqassim biex tottimizza t-tqassim.

3. It-tqassim iqis iż-żieda xierqa tal-ispazju fil-wajers densi biex tiġi evitata s-sitwazzjoni li ma tistax tiġi mgħoddija.

4. Jekk jiġu adottati materjali speċjali, apparati speċjali (bħal 0.5mmBGA, eċċ.), u proċessi speċjali, il-perjodu tal-kunsinna u l-proċessabbiltà ġew ikkunsidrati bis-sħiħ, u kkonfermati mill-manifatturi tal-PCB u l-persunal tal-proċess.

5. Ir-relazzjoni korrispondenti tal-pin tal-konnettur tal-gusset ġiet ikkonfermata biex tevita li d-direzzjoni u l-orjentazzjoni tal-konnettur tal-gusset jiġu maqluba.

6. If there are ICT test requirements, consider the feasibility of adding ICT test points during layout, so as to avoid difficulty in adding test points during the wiring phase.

7. When a high-speed optical module is included, the layout of the optical port transceiver circuit is prioritized.

8. Wara li jitlesta t-tqassim, ġie pprovdut tpinġija tal-assemblaġġ 1:1 għall-persunal tal-proġett biex jiċċekkja jekk l-għażla tal-pakkett tal-apparat hijiex korretta kontra l-entità tal-apparat.

9. Fil-ftuħ tat-tieqa, il-pjan ta ‘ġewwa ġie kkunsidrat li jiġi rtirat, u żona ta’ projbizzjoni tal-wajers xierqa ġiet stabbilita.