In design, layout is an important part. The quality of the layout result will directly affect the effect of the wiring, so it can be considered that a reasonable layout is the first step to a successful PCB design. Especially the pre-layout is the process of thinking about the entire circuit board, signal flow, heat dissipation, structure and other structures. If the pre-layout fails, no amount of effort will be needed.

PCB layout design The design process flow of printed circuit boards includes schematic design, electronic component database registration, design preparation, block division, electronic component configuration, configuration confirmation, wiring and final inspection. In the process of the process, no matter which process is found to be a problem, it must be returned to the previous process for reconfirmation or correction.

This article first introduces the PCB layout design rules and techniques, and then explains how to design and inspect the PCB layout, from the layout’s DFM requirements, thermal design requirements, signal integrity requirements, EMC requirements, layer settings and power ground division requirements, and power modules. The requirements and other aspects will be analyzed in detail, and follow the editor to find out the details.

PCB layout design rules

1. Under normal circumstances, all components should be arranged on the same surface of the circuit board. Only when the top-level components are too dense, can some devices with limited height and low heat generation, such as chip resistors, chip capacitors, and chip capacitors, be installed. Chip IC, etc. are placed on the lower layer.

2. Under the premise of ensuring the electrical performance, the components should be placed on the grid and arranged parallel or perpendicular to each other in order to be neat and beautiful. Under normal circumstances, the components are not allowed to overlap; the arrangement of the components should be compact, and the components should be arranged on the entire layout. The distribution is uniform and dense.

3. The minimum distance between adjacent land patterns of different components on the circuit board should be above 1mm.

4. The distance from the edge of the circuit board is generally not less than 2MM. The best shape of the circuit board is rectangular, and the aspect ratio is 3:2 or 4:3. When the size of the circuit board is larger than 200MM by 150MM, consider what the circuit board can withstand Mechanical strength.

PCB layout design skills

In the layout design of the PCB, the units of the circuit board should be analyzed, and the layout design should be based on the starting function. When laying out all the components of the circuit, the following principles should be met:

1. Arrange the position of each functional circuit unit according to the circuit flow, so that the layout is convenient for signal circulation, and the signal is kept in the same direction as much as possible [1].

2. Take the core components of each functional unit as the center and lay out around him. The components should be uniformly, integrally and compactly arranged on the PCB to minimize and shorten the leads and connections between the components.

3. For circuits operating at high frequencies, the distribution parameters between components must be considered. In general circuits, components should be arranged in parallel as much as possible, which is not only beautiful, but also easy to install and easy to mass produce.

How to design and inspect the PCB layout

1. DFM requirements for layout

1. The optimal process route has been determined, and all devices have been placed on the board.

2. The origin of the coordinates is the intersection of the left and lower extension lines of the board frame, or the lower left pad of the lower left socket.

3. The actual size of the PCB, the location of the positioning device, etc. are consistent with the process structure element map, and the device layout of the area with restricted device height requirements meets the requirements of the structure element map.

4. The position of the dial switch, reset device, indicator light, etc. is appropriate, and the handle bar does not interfere with the surrounding devices.

5. The outer frame of the board has a smooth radian of 197mil, or is designed according to the structural size drawing.

6. Ordinary boards have 200mil process edges; the left and right sides of the backplane have process edges greater than 400mil, and the upper and lower sides have process edges greater than 680mil. The device placement does not conflict with the window opening position.

7. All kinds of additional holes (ICT positioning hole 125mil, handle bar hole, elliptical hole and fiber holder hole) that need to be added are all missing and set correctly.

8. The device pin pitch, device direction, device pitch, device library, etc. that have been processed by wave soldering take into account the requirements of wave soldering.

9. The device layout spacing meets the assembly requirements: surface mount devices are greater than 20mil, IC is greater than 80mil, and BGA is greater than 200mil.

10. The crimping parts have more than 120 mils in the component surface distance, and there is no device in the through area of ​​the crimping parts on the welding surface.

11. There are no short devices between tall devices, and no patch devices and short and small interposing devices are placed within 5mm between devices with a height greater than 10mm.

12. Polar devices have polarity silkscreen logos. The X and Y directions of the same type of polarized plug-in components are the same.

13. All devices are clearly marked, no P*, REF, etc. are not clearly marked.

14. There are 3 positioning cursors on the surface containing SMD devices, which are placed in an “L” shape. The distance between the center of the positioning cursor and the edge of the board is greater than 240 mils.

15. If you need to do boarding processing, the layout is considered to facilitate the boarding and PCB processing and assembly.

16. The chipped edges (abnormal edges) should be filled in by means of milling grooves and stamp holes. The stamp hole is a non-metallized void, generally 40 mils in diameter and 16 mils from the edge.

17. The test points used for debugging have been added in the schematic diagram, and they are placed appropriately in the layout.

Second, the thermal design requirements of the layout

1. Heating components and exposed components of the casing are not in close proximity to wires and heat-sensitive components, and other components should also be properly kept away.

2. The placement of the radiator takes into account the convection problem, and there is no interference of high components in the projection area of ​​the radiator, and the range is marked on the mounting surface with silk screen.

3. The layout takes into account the reasonable and smooth heat dissipation channels.

4. The electrolytic capacitor should be properly separated from the high-heat device.

5. Consider the heat dissipation of high-power devices and devices under the gusset.

Third, the signal integrity requirements of the layout

1. The start-end matching is close to the sending device, and the end matching is close to the receiving device.

2. Place decoupling capacitors close to related devices

3. Place crystals, crystal oscillators and clock drive chips close to related devices.

4. High-speed and low-speed, digital and analog are arranged separately according to modules.

5. Determine the topological structure of the bus based on the analysis and simulation results or the existing experience to ensure that the system requirements are met.

6. If it is to modify the board design, simulate the signal integrity problem reflected in the test report and give a solution.

7. The layout of the synchronous clock bus system meets the timing requirements.

Four, EMC requirements

1. Inductive devices that are prone to magnetic field coupling, such as inductors, relays, and transformers, should not be placed close to each other. When there are multiple inductance coils, the direction is vertical and they are not coupled.

2. In order to avoid electromagnetic interference between the device on the welding surface of the single board and the adjacent single board, no sensitive devices and strong radiation devices should be placed on the welding surface of the single board.

3. The interface components are placed close to the edge of the board, and appropriate EMC protection measures have been taken (such as shielding shells, hollowing out of the power supply ground, etc.) to improve the EMC capability of the design.

4. The protection circuit is placed near the interface circuit, following the principle of first protection and then filtering.

5. The distance from the shielding body and the shielding shell to the shielding body and shielding cover shell is more than 500 mils for the devices with high transmitting power or particularly sensitive (such as crystal oscillators, crystals, etc.).

6. A 0.1uF capacitor is placed near the reset line of the reset switch to keep the reset device and reset signal away from other strong devices and signals.

Five, layer setting and power supply and ground division requirements

1. When two signal layers are directly adjacent to each other, vertical wiring rules must be defined.

2. The main power layer is adjacent to its corresponding ground layer as much as possible, and the power layer meets the 20H rule.

3. Each wiring layer has a complete reference plane.

4. Multi-layer boards are laminated and the core material (CORE) is symmetrical to prevent warping caused by uneven distribution of copper skin density and asymmetrical thickness of the medium.

5. The thickness of the board should not exceed 4.5mm. For those with a thickness greater than 2.5mm (backplane greater than 3mm), the technicians should have confirmed that there is no problem with the PCB processing, assembly, and equipment, and the PC card board thickness is 1.6mm.

6. When the thickness-to-diameter ratio of the via is greater than 10:1, it will be confirmed by the PCB manufacturer.

7. The power and ground of the optical module are separated from other power and ground to reduce interference.

8. The power and ground processing of key components meet the requirements.

9. When impedance control is required, the layer setting parameters meet the requirements.

Six, power module requirements

1. The layout of the power supply part ensures that the input and output lines are smooth and do not cross.

2. When the single board supplies power to the subboard, place the corresponding filter circuit near the power outlet of the single board and the power inlet of the subboard.

Seven, other requirements

1. The layout takes into account the overall smoothness of the wiring, and the main data flow is reasonable.

2. Adjust the pin assignments of the exclusion, FPGA, EPLD, bus driver and other devices according to the layout results to optimize the layout.

3. The layout takes into account the appropriate increase of the space at the dense wiring to avoid the situation that it cannot be routed.

4. If special materials, special devices (such as 0.5mmBGA, etc.), and special processes are adopted, the delivery period and processability have been fully considered, and confirmed by PCB manufacturers and process personnel.

5. The pin corresponding relationship of the gusset connector has been confirmed to prevent the direction and orientation of the gusset connector from being reversed.

6. If there are ICT test requirements, consider the feasibility of adding ICT test points during layout, so as to avoid difficulty in adding test points during the wiring phase.

7. When a high-speed optical module is included, the layout of the optical port transceiver circuit is prioritized.

8. After the layout is completed, a 1:1 assembly drawing has been provided for the project personnel to check whether the device package selection is correct against the device entity.

9. At the opening of the window, the inner plane has been considered to be retracted, and a suitable wiring prohibition area has been set.