I ka hoʻolālā o Papa PCB, me ka hoʻonui wikiwiki ʻana o ka pinepine, e nui ana nā mea keʻakeʻa a ʻokoʻa ia mai ka papa PCB haʻahaʻa haʻahaʻa. Eia kekahi, me ka hoʻonui ʻana o ke alapine a me ka contradict ma waena o ka miniaturization a me ke kumu kūʻai haʻahaʻa o ka papa PCB, e ʻoi aku ka paʻakikī a paʻakikī kēia mau mea.

I ka noiʻi maoli, hiki iā mākou ke hoʻopau he ʻehā mau hiʻohiʻona o ke ākea, e like me ka walaʻau o ka lako, ka hoʻoweliweli laina laina, ka hoʻopili ʻana a me ka hoʻopili electromagnetic (EMI). Ma ke kālailai ʻana i nā pilikia kūpilikiʻi o ka PCB alapine kiʻekiʻe a me ka hoʻohui pū ʻana me ka hana i ka hana, hāʻawi ʻia nā hopena maikaʻi.

ʻO ka mea mua, halulu lako mana

I ke kaapuni alapine kiʻekiʻe, loaʻa ka halulu o ka mana i kahi mana maopopo i ka hōʻailona pinepine pinepine. Therefore, the first requirement of the power supply is low noise. ʻO nā papa maʻemaʻe he mea nui e like me ka uila uila. No ke aha mai? Hōʻike ʻia nā ʻano mana i ke kiʻi 1. ʻIke loa, loaʻa i kahi mana ka impedance, a hāʻawi ʻia ka impedance ma luna o ka mana holoʻokoʻa, no laila, e hoʻohui ʻia ka leo i ka lako mana.

Then we should minimize the impedance of the power supply, so it is best to have a dedicated power supply layer and grounding layer. I ka hoʻolālā kaapuni hf, ʻoi aku ka maikaʻi o ka hoʻolālā ʻana i ka lako mana ma ke ʻano he papa ma mua o ke kaʻa ʻōhua i ka hapanui o nā hihia, i hiki ai i ka loop ke ukali mau i ke ala o ka impedance liʻiliʻi.

In addition, the power board must provide a signal loop for all generated and received signals on the PCB. This minimizes the signal loop and thus reduces noise, which is often overlooked by low-frequency circuit designers.

Hoʻolālā ʻia ka hoʻolālā PCB alapine kiʻekiʻe loa i nā hoʻoponopono ākea

Helu 1: Nā mana mana

Nui a hewahewa nā ala e hoʻopau ai i ka walaʻau i ka hoʻolālā PCB:

1. Note the through hole on the board: the through hole requires etched openings on the power supply layer to leave space for the through hole to pass through. Inā nui ka wehe ʻana o ka mana lako mana, nakinaki ʻia ia e hoʻopili i ka loop loop, ua hoʻokikina ʻia e hōʻailona, ​​piʻi ka wahi loop, a hoʻonui ka leo. At the same time, if several signal lines are clustered near the opening and share the same loop, the common impedance will cause crosstalk. E nānā i ke kiʻi 2.

Hoʻolālā ʻia ka hoʻolālā PCB alapine kiʻekiʻe loa i nā hoʻoponopono ākea

Kiʻi 2: Ke ala maʻamau o ka loop loop bypass

2. The connection line needs enough ground: each signal needs to have its own proprietary signal loop, and the loop area of the signal and loop is as small as possible, that is to say, the signal and loop should be parallel.

3. Analog a me ka mana uila e hoʻokaʻawale: ʻike nui nā hāmeʻa pinepine pinepine i ka walaʻau uila, no laila e hoʻokaʻawale ʻia nā mea ʻelua, hoʻohui pū ʻia ma ka puka o ka lako mana, inā ka hōʻailona ma waena o nā ʻāpana analog a me nā kikohoʻe o ka mau huaʻōlelo, hiki ke kau ʻia i ka hōʻailona ma o ka loop e hoʻēmi i ka wahi o ka loop. Hōʻike ʻia ka laulā digital-analog i hoʻohana ʻia no ka loop loop ma ke kiʻi 3.

Hoʻolālā ʻia ka hoʻolālā PCB alapine kiʻekiʻe loa i nā hoʻoponopono ākea

Figure 3: Digital – analog span for signal loop

4. Avoid overlapping of separate power supplies between layers: otherwise circuit noise can easily pass through parasitic capacitive coupling.

5. Isolate sensitive components: such as PLL.

6. Place the power cable: To reduce the signal loop, place the power cable on the edge of the signal line to reduce the noise, as shown in Figure 4.

Hoʻolālā ʻia ka hoʻolālā PCB alapine kiʻekiʻe loa i nā hoʻoponopono ākea

Kiʻi 4: E kau i ke kaula uila ma ka ʻaoʻao o ka laina hōʻailona

Two, transmission line

ʻElua wale nā ​​laina hoʻoili hiki i ka PCB:

ʻO ka pilikia nui o ka laina lipine a me ka laina microwave ka noʻonoʻo. ʻO ka noʻonoʻo ʻana ke kumu o nā pilikia he nui. ʻO kahi laʻana, ʻo ka hōʻailona ukana ka superposition o ka hōʻailona kumu a me ka hōʻailona echo, kahi e hoʻonui ai i ka paʻakikī o ka hōʻailona hōʻailona. Hoʻohālikelike ka noʻonoʻo i ka nalo ʻana o ka hoʻi

1. E hoʻonui ka hōʻailona i ke kumu hōʻailona e hoʻonui i ka walaʻau o ka ʻōnaehana, e lilo ana i mea paʻakikī no ka mea loaʻa ke hoʻokaʻawale i ka leo mai ka hōʻailona;

2. Any reflected signal will basically degrade the signal quality and change the shape of the input signal. Generally speaking, the solution is mainly impedance matching (for example, the impedance of the interconnection should very match the impedance of the system), but sometimes the calculation of impedance is more troublesome, you can refer to some transmission line impedance calculation software. The methods of eliminating transmission line interference in PCB design are as follows:

(a) Pale i ka impedance discontinuity o nā laina hoʻoili. ʻO ke kiko o ka impedance hoʻomau ʻole ke kiko o ka hoʻololi ʻana o ka laina hoʻoili, e like me ke kihi pololei, ma o ka puka, a me nā mea ʻē aʻe, pono e hōʻalo ʻia a hiki i ka hiki. Nā Kiʻina hana: I mea e hōʻalo ai i nā kihi pololei o ka laina, a hiki i ka 45 ° Angle a i ʻole ke arc, hiki i kahi Angle nui ke; E hoʻohana i kekahi ma o nā puka i hiki, no ka mea, ʻo kēlā me kēia puka o kahi impedance discontinuity, e like me ka hōʻike ʻia ma FIG. 5; Signals from the outer layer avoid passing through the inner layer and vice versa.

Hoʻolālā ʻia ka hoʻolālā PCB alapine kiʻekiʻe loa i nā hoʻoponopono ākea

Figure 5: Method for eliminating transmission line interference

(b) Do not use stake lines. No ka mea he kumu o ka walaʻau kekahi laina paila. Inā pōkole ka laina o ka paila, hiki ke hoʻohui ʻia ma ka hopena o ka laina hoʻoili; Inā lōʻihi ka laina o ka paila, e lawe ia i ka laina hoʻoili nui e like me ke kumu a hana i ka noʻonoʻo nui, kahi e hoʻopiʻi ai i ka pilikia. Paipai ʻia ʻaʻole e hoʻohana.

ʻO ke kolu, ka hoʻopili ʻana

1. Common impedance coupling: it is a common coupling channel, that is, the interference source and the interfered device often share some conductors (such as loop power supply, bus, and common grounding), as shown in Figure 6.

Hoʻolālā ʻia ka hoʻolālā PCB alapine kiʻekiʻe loa i nā hoʻoponopono ākea

Kiʻi 6: Hoʻohui impedance maʻamau

In this channel, the drop back of the Ic causes a common-mode voltage in the series current loop, affecting the receiver.

2. The field common-mode coupling will cause the radiation source to cause common-mode voltages in the loop formed by the interfered circuit and on the common reference surface.

If the magnetic field is dominant, the value of the common-mode voltage generated in the series ground circuit is Vcm=-(△B/△t)* area (where △B= change in magnetic induction intensity). If it is an electromagnetic field, when its electric field value is known, its induced voltage: Vcm=(L* H *F*E)/48, the formula is suitable for L(m)=150MHz, beyond this limit, the calculation of the maximum induced voltage can be simplified as: Vcm=2* H *E.

3. Differential mode field coupling: refers to the direct radiation by wire pair or circuit board on the lead and its loop induction received. If you get as close to the two wires as possible. Hoʻoemi nui ʻia kēia hoʻopili ʻana, no laila hiki ke wili pū ʻia nā kaula ʻelua e hoʻoliʻiliʻi i ka hihia.

4. Inter-line coupling (crosstalk) can cause unwanted coupling between any line or parallel circuit, which will greatly damage the performance of the system. Its type can be divided into capacitive crosstalk and perceptual crosstalk.

The former is because the parasitic capacitance between the lines makes the noise on the noise source coupled to the noise receiving line through current injection. The latter can be thought of as the coupling of signals between the primary stages of an unwanted parasitic transformer. ʻO ka nui o ka crosstalk inductive e pili ana i ka pili o nā puka lou ʻelua, ka nui o ka loop loop, a me ka impedance o ka ukana i hoʻopili ʻia.

5. Hoʻopili uea uila: Hoʻopili ʻia nā kaula uila ac a DC paha e ka hoʻopili electromagnetic

Hoʻolilo i nā hāmeʻa ʻē aʻe.

There are several ways to eliminate crosstalk in PCB design:

1. Hoʻonui ka nui o nā ʻano crosstalk me ka hoʻonui ʻia o ka impedance, no laila pono e hoʻopau pono ʻia nā laina hōʻailona i ka hoʻopilikia ʻia e crosstalk.

2. E hoʻonui i ka mamao ma waena o nā laina hōʻailona e hōʻemi pono i ka crosstalk capacitive. Ka hoʻomalu honua, ka hakahaka ma waena o nā uea (e like me nā laina hōʻailona hana a me nā laina honua no ka hoʻokaʻawale, keu hoʻi i ka mokuʻāina o ka lele ma waena o ka laina hōʻailona a me ka honua i ka wā waena) a hoʻēmi i ka inductance kēpau.

3. Capacitive crosstalk can also be effectively reduced by inserting a ground wire between adjacent signal lines, which must be connected to the formation every quarter of a wavelength.

4. No ka crosstalk kūpono, pono e hoʻoliʻiliʻi i ka wahi o ka loop, a inā ʻae ʻia, e hoʻopau ʻia ka loop.

5. Avoid signal sharing loops.

6. E nānā i ka pono o ka hōʻailona: pono ka mea hoʻolālā e hoʻokō i nā hopena i ke kaʻina hana hao e hoʻonā i ka pono o ka hōʻailona. Hiki i nā mea hoʻolālā ke hoʻohana nei i kēia ala ke nānā aku i ka lōʻihi o ka microstrip o ka pale keleawe keleawe i mea e loaʻa ai ka maikaʻi o ka hana pono o ka hōʻailona. For systems with dense connectors in the communication structure, the designer can use a PCB as the terminal.

Four, electromagnetic interference

As the speed increases, EMI becomes more and more serious and presents in many aspects (such as electromagnetic interference at interconnects). High-speed devices are particularly sensitive to this and will receive high-speed spurious signals, while low-speed devices will ignore such spurious signals.

There are several ways to eliminate electromagnetic interference in PCB design:

1. E ho’ēmi i nā puka lou: ua like kēlā me kēia loop me kahi antenna, no laila pono mākou e hōʻemi i ka helu o nā lou, ka wahi o nā lou a me ka hopena antenna o nā lou. Make sure the signal has only one loop path at any two points, avoid artificial loops and use the power layer whenever possible.

2. Filtering: Filtering can be used to reduce EMI on both the power line and the signal line. There are three methods: decoupling capacitor, EMI filter and magnetic element. EMI filter is shown in Figure 7.

Hoʻolālā ʻia ka hoʻolālā PCB alapine kiʻekiʻe loa i nā hoʻoponopono ākea

Kiʻi 7: ʻAno kānana

3. The shielding. Ma muli o ka lōʻihi o ka hoʻopuka me ka nui o nā kūkā pale pale kūkākūkā, ʻaʻole hoʻolauna kikoʻī hou.

4. Reduce the speed of high-frequency devices.

5. Hoʻonui i ka hoʻomau dielectric o ka papa PCB, hiki ke pale i nā ʻāpana pinepine e like me ka laina hoʻoili kokoke i ka papa mai ka uila ʻana i waho. Increase the thickness of PCB board, minimize the thickness of microstrip line, can prevent electromagnetic line spillover, can also prevent radiation.

At this point, we can conclude that in hf PCB design, we should follow the following principles:

1. Unification and stability of power supply and ground.

2. Carefully considered wiring and proper terminations can eliminate reflections.

3. E noʻonoʻo pono i nā pilina a me nā hoʻopau pono ʻana e hiki ke hōʻemi i ka capacitive a me ka inductive crosstalk.

4. Noise suppression koi ʻia e hoʻokō i nā pono EMC.