高頻PCB設計出現干擾解決方案

在設計中 PCB板,隨著頻率的快速增加,會出現很多不同於低頻PCB板的干擾。 而且,隨著頻率的增加以及PCB板小型化與低成本之間的矛盾,這些干擾會變得越來越複雜。

在實際研究中,我們可以得出乾擾主要有四個方面,包括電源噪聲、傳輸線乾擾、耦合和電磁干擾(EMI)。 通過分析高頻PCB的各種干擾問題,並結合工作實踐,提出了有效的解決方案。

印刷電路板

一、電源噪聲

在高頻電路中,電源噪聲對高頻信號有明顯的影響。 Therefore, the first requirement of the power supply is low noise. 清潔地板與清潔電力一樣重要。 為什麼? 功率特性如圖 1 所示。 顯然,電源具有一定的阻抗,並且阻抗分佈在整個電源上,因此,噪聲會加到電源中。

Then we should minimize the impedance of the power supply, so it is best to have a dedicated power supply layer and grounding layer. 在高頻電路設計中,在大多數情況下,將電源設計為層比設計為總線要好得多,這樣環路可以始終遵循最小阻抗的路徑。

此外,電源板必須為 PCB 上所有生成和接收的信號提供信號迴路。 這最大限度地減少了信號環路,從而降低了低頻電路設計人員經常忽視的噪聲。

高頻PCB設計出現干擾解決方案

圖 1:功率特性

PCB設計中有幾種消除電源噪聲的方法:

1. Note the through hole on the board: the through hole requires etched openings on the power supply layer to leave space for the through hole to pass through. 如果電源層開度過大,勢必會影響信號環路,信號被迫旁路,環路面積增大,噪聲增大。 At the same time, if several signal lines are clustered near the opening and share the same loop, the common impedance will cause crosstalk. 見圖2。

高頻PCB設計出現干擾解決方案

圖 2:旁路信號迴路的公共路徑

2. The connection line needs enough ground: each signal needs to have its own proprietary signal loop, and the loop area of the signal and loop is as small as possible, that is to say, the signal and loop should be parallel.

3.模擬和數字電源要分開:高頻設備一般對數字噪聲很敏感,所以兩者應該分開,在電源入口處連接在一起,如果信號穿過模擬和數字部分的話,可以將信號放置在一個環路上,以減少環路面積。 用於信號環路的數模跨度如圖 3 所示。

高頻PCB設計出現干擾解決方案

Figure 3: Digital – analog span for signal loop

4. Avoid overlapping of separate power supplies between layers: otherwise circuit noise can easily pass through parasitic capacitive coupling.

5. Isolate sensitive components: such as PLL.

6. Place the power cable: To reduce the signal loop, place the power cable on the edge of the signal line to reduce the noise, as shown in Figure 4.

高頻PCB設計出現干擾解決方案

圖 4:將電源線放在信號線旁邊

Two, transmission line

PCB 中只有兩條可能的傳輸線:

帶狀線和微波線最大的問題是反射。 反射會導致很多問題。 例如,負載信號會是原始信號和回波信號的疊加,這會增加信號分析的難度。 反射會導致回波損耗(return loss),它對信號的影響與加性噪聲干擾一樣嚴重:

1、反射回信號源的信號會增加系統的噪聲,使接收機更難區分噪聲和信號;

2. Any reflected signal will basically degrade the signal quality and change the shape of the input signal. Generally speaking, the solution is mainly impedance matching (for example, the impedance of the interconnection should very match the impedance of the system), but sometimes the calculation of impedance is more troublesome, you can refer to some transmission line impedance calculation software. The methods of eliminating transmission line interference in PCB design are as follows:

(a) 避免傳輸線的阻抗不連續。 阻抗不連續點是傳輸線突變點,如直角、通孔等,應盡量避免。 方法:避免直線拐角,盡量走45°角或圓弧,大角也可以; 使用盡可能少的通孔,因為每個通孔都是一個阻抗不連續點,如圖 5 所示。 XNUMX; Signals from the outer layer avoid passing through the inner layer and vice versa.

高頻PCB設計出現干擾解決方案

Figure 5: Method for eliminating transmission line interference

(b) Do not use stake lines. 因為任何樁線都是噪音的來源。 若樁線較短,可接在傳輸線末端; 如果樁線很長,就會以主傳輸線為源,產生很大的反射,使問題複雜化。 建議不要使用它。

三、聯軸器

1. Common impedance coupling: it is a common coupling channel, that is, the interference source and the interfered device often share some conductors (such as loop power supply, bus, and common grounding), as shown in Figure 6.

高頻PCB設計出現干擾解決方案

圖 6:公共阻抗耦合

In this channel, the drop back of the Ic causes a common-mode voltage in the series current loop, affecting the receiver.

2. The field common-mode coupling will cause the radiation source to cause common-mode voltages in the loop formed by the interfered circuit and on the common reference surface.

If the magnetic field is dominant, the value of the common-mode voltage generated in the series ground circuit is Vcm=-(△B/△t)* area (where △B= change in magnetic induction intensity). If it is an electromagnetic field, when its electric field value is known, its induced voltage: Vcm=(L* H *F*E)/48, the formula is suitable for L(m)=150MHz, beyond this limit, the calculation of the maximum induced voltage can be simplified as: Vcm=2* H *E.

3. Differential mode field coupling: refers to the direct radiation by wire pair or circuit board on the lead and its loop induction received. If you get as close to the two wires as possible. 這種耦合大大減少,因此可以將兩根線絞在一起以減少干擾。

4. Inter-line coupling (crosstalk) can cause unwanted coupling between any line or parallel circuit, which will greatly damage the performance of the system. Its type can be divided into capacitive crosstalk and perceptual crosstalk.

The former is because the parasitic capacitance between the lines makes the noise on the noise source coupled to the noise receiving line through current injection. The latter can be thought of as the coupling of signals between the primary stages of an unwanted parasitic transformer. 電感串擾的大小取決於兩個迴路的接近程度、迴路面積的大小以及受影響負載的阻抗。

5、電源線耦合:交流或直流電源線受到電磁干擾

轉移到其他設備。

There are several ways to eliminate crosstalk in PCB design:

1、兩種串擾都隨著負載阻抗的增加而增加,因此對串擾引起的干擾敏感的信號線應適當端接。

2. 盡量拉近信號線之間的距離,有效降低電容串擾。 接地管理,佈線之間的間距(如有源信號線和地線進行隔離,特別是信號線和地之間的跳變狀態要間隔)並減少引線電感。

3. Capacitive crosstalk can also be effectively reduced by inserting a ground wire between adjacent signal lines, which must be connected to the formation every quarter of a wavelength.

4. 對於合理串擾,應盡量減少環路面積,如果允許,應消除環路。

5. Avoid signal sharing loops.

6、注意信號完整性:設計者應在焊接過程中實現端部解決信號完整性問題。 使用這種方法的設計人員可以專注於屏蔽銅箔的微帶長度,以獲得良好的信號完整性性能。 For systems with dense connectors in the communication structure, the designer can use a PCB as the terminal.

Four, electromagnetic interference

As the speed increases, EMI becomes more and more serious and presents in many aspects (such as electromagnetic interference at interconnects). High-speed devices are particularly sensitive to this and will receive high-speed spurious signals, while low-speed devices will ignore such spurious signals.

PCB設計中消除電磁干擾的方法有以下幾種:

1.減少迴路:每個迴路相當於一個天線,所以我們需要盡量減少迴路的數量、迴路的面積和迴路的天線效應。 Make sure the signal has only one loop path at any two points, avoid artificial loops and use the power layer whenever possible.

2. Filtering: Filtering can be used to reduce EMI on both the power line and the signal line. There are three methods: decoupling capacitor, EMI filter and magnetic element. EMI filter is shown in Figure 7.

高頻PCB設計出現干擾解決方案

圖 7:過濾器類型

3. The shielding. 由於本期篇幅加上大量討論屏蔽文章,不再具體介紹。

4. Reduce the speed of high-frequency devices.

5、增加PCB板的介電常數,可以防止靠近板的傳輸線等高頻部分向外輻射; Increase the thickness of PCB board, minimize the thickness of microstrip line, can prevent electromagnetic line spillover, can also prevent radiation.

At this point, we can conclude that in hf PCB design, we should follow the following principles:

1. Unification and stability of power supply and ground.

2. 仔細考慮佈線和適當的端接可以消除反射。

3. 仔細考慮佈線和適當的端接可以減少電容和電感串擾。

4. 噪聲抑制需要滿足EMC要求。