Tuhinga o mua Poari PCB, me te tere haere o te auau, ka nui te pokanoa e rere ke ana i te poari PCB iti-auau. Ano hoki, me te piki haere o te auau me te taupatupatu i waenga i te iti me te iti o te utu mo te poari PCB, ka uaua haere enei awangawanga.

I roto i nga rangahau tuuturu, ka taea e taatau te whakatau e wha nga waahanga o te pokanoa, tae atu ki te haruru o te kaha, te aukati i te raina whakawhiti, te hono me te aukatinga hiko (EMI). Na roto i te wetewete i nga momo raru o te PCB tino-auau, me te whakakotahi i nga mahi, ka tukuna nga rongoa whai hua.

Tuatahi, te haruru o te hiko

I roto i te ara iahiko tino nui, ko te haruru o te hiko hikoi te kaha o te awe ki te tohu auau nui. Therefore, the first requirement of the power supply is low noise. Clean floors are just as important as clean electricity. Why? The power characteristics are shown in Figure 1. Ae ra, ko te mana o te mana he tino koretake, a ka tohatohahia te aukati ki runga i te katoa o te hiko, no reira, ka tapirihia te tangi ki te hiko.

Then we should minimize the impedance of the power supply, so it is best to have a dedicated power supply layer and grounding layer. I roto i te hoahoa araahiko hf, he pai ake te hoahoa i te kohinga mana hei paparanga kaua ki te pahi i te nuinga o te keehi, kia whai tonu ai te koropiko i te ara o te iti o te aukati.

In addition, the power board must provide a signal loop for all generated and received signals on the PCB. This minimizes the signal loop and thus reduces noise, which is often overlooked by low-frequency circuit designers.

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Whakaatu 1: Nga mana hiko

He maha nga huarahi hei whakakore i te haruru o te kaha i te hoahoa PCB:

1. Note the through hole on the board: the through hole requires etched openings on the power supply layer to leave space for the through hole to pass through. If the opening of the power supply layer is too large, it is bound to affect the signal loop, the signal is forced to bypass, the loop area increases, and the noise increases. At the same time, if several signal lines are clustered near the opening and share the same loop, the common impedance will cause crosstalk. Tirohia te Whakaahua 2.

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Whakaatu 2: Te ara noa o te tohu tohu whakawhiti

2. The connection line needs enough ground: each signal needs to have its own proprietary signal loop, and the loop area of the signal and loop is as small as possible, that is to say, the signal and loop should be parallel.

3. Te mana tuku iho me te mana matihiko hei wehe: ko nga taputapu auau-nui he tino aro ki te haruru a tihi, no reira me wehe nga mea e rua, honohono ngatahi i te tomokanga o te hiko, mena ka puta te tohu puta noa i te analog me nga waahanga matihiko o te kupu, ka taea te tuu ki roto i te tohu puta noa i te koropiko hei whakaiti i te rohe koropiko. Ko te roanga-taatai-taatai ​​e whakamahia ana mo te tohu tohu e whakaaturia ana i te Whakaahua 3.

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Figure 3: Digital – analog span for signal loop

4. Avoid overlapping of separate power supplies between layers: otherwise circuit noise can easily pass through parasitic capacitive coupling.

5. Isolate sensitive components: such as PLL.

6. Place the power cable: To reduce the signal loop, place the power cable on the edge of the signal line to reduce the noise, as shown in Figure 4.

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Whakaahua 4: Whakanohia te taura hiko ki te taha o te raina tohu

Two, transmission line

E rua noa nga raina whakawhiti i te PCB:

Ko te raru nui o te raina riipene me te raina ngaruiti ko te whakaata. Ma te whakaaroaro ka nui nga raru. Hei tauira, ko te tohu kawenga hei superposition o te tohu taketake me te tohu aoro, ka whakapiki i te uaua ki te wetewete tohu. Ko te whakaata te take o te hokinga mai o te hokinga (hokinga o te hokinga mai), e pa ana ki te tohu rite kino ki te parekura o te haruru tāpiri:

1. Ko te tohu e whakaatuhia ana ki te puna tohu ka whakanui i te haruru o te punaha, ka uaua ake ma te kaiwhiwhi ki te wehewehe i te tangi mai i te tohu;

2. Any reflected signal will basically degrade the signal quality and change the shape of the input signal. Generally speaking, the solution is mainly impedance matching (for example, the impedance of the interconnection should very match the impedance of the system), but sometimes the calculation of impedance is more troublesome, you can refer to some transmission line impedance calculation software. The methods of eliminating transmission line interference in PCB design are as follows:

(a) Avoid impedance discontinuity of transmission lines. Ko te tohu mo te kore e tutuki ko te tohu o te hurihanga o te raina whakawhiti, penei i te kokonga totika, na roto i te poka, me etahi atu, me karohia kia taea. Tikanga: Hei karo i nga kokonga tika o te raina, tae atu ki te 45 ° Koki me te pewa, ka taea ano te Koki nui; Use as few through holes as possible, because each through hole is an impedance discontinuity, as shown in FIG. 5; Signals from the outer layer avoid passing through the inner layer and vice versa.

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Figure 5: Method for eliminating transmission line interference

(b) Do not use stake lines. Na te mea ko tetahi raina puranga te putuputu o te haruru. Mena he poto te raina puranga, ka taea te hono i te pito o te raina whakawhiti; Mena he roa te raarangi puranga, ka waiho te raina whakawhiti hei puna maana ka whakaputa whakaaro nui, ka raru te raru. E taunaki ana kia kaua e whakamahia.

Tuatoru, ko te taapiri

1. Common impedance coupling: it is a common coupling channel, that is, the interference source and the interfered device often share some conductors (such as loop power supply, bus, and common grounding), as shown in Figure 6.

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Whakaahua 6: Nga hononga hono noa

In this channel, the drop back of the Ic causes a common-mode voltage in the series current loop, affecting the receiver.

2. The field common-mode coupling will cause the radiation source to cause common-mode voltages in the loop formed by the interfered circuit and on the common reference surface.

If the magnetic field is dominant, the value of the common-mode voltage generated in the series ground circuit is Vcm=-(△B/△t)* area (where △B= change in magnetic induction intensity). If it is an electromagnetic field, when its electric field value is known, its induced voltage: Vcm=(L* H *F*E)/48, the formula is suitable for L(m)=150MHz, beyond this limit, the calculation of the maximum induced voltage can be simplified as: Vcm=2* H *E.

3. Differential mode field coupling: refers to the direct radiation by wire pair or circuit board on the lead and its loop induction received. If you get as close to the two wires as possible. Ka tino whakaitihia tenei hononga, no reira ka taea te huri ngatahi nga waea e rua hei whakaiti i te aukati.

4. Inter-line coupling (crosstalk) can cause unwanted coupling between any line or parallel circuit, which will greatly damage the performance of the system. Its type can be divided into capacitive crosstalk and perceptual crosstalk.

The former is because the parasitic capacitance between the lines makes the noise on the noise source coupled to the noise receiving line through current injection. The latter can be thought of as the coupling of signals between the primary stages of an unwanted parasitic transformer. Ko te rahinga o te crosstalk whakauru ka whakawhirinaki ki te tata o nga koropiko e rua, te rahinga o te rohe koropiko, me te aukati o te kawenga e pa ana.

5. Te taura taura hiko: Ko nga taura ac, DC ranei, i raru i te aukatinga hiko

Transfer to other devices.

There are several ways to eliminate crosstalk in PCB design:

1. Both types of crosstalk increase with the increase of load impedance, so the signal lines sensitive to interference caused by crosstalk should be properly terminated.

2. Whakanuihia te tawhiti i waenga i nga raina tohu kia pai ai te whakaiti i te crosstalk capacitive. Te whakahaere i te whenua, te mokowhiti i waenga i nga waea waea (penei i nga raina tohu kaha me nga raina whenua mo te wehe, ina koa i te ahua o te peke i waenga i te raina tohu me te papa ki te waa) me te whakaiti i te arataki mata.

3. Capacitive crosstalk can also be effectively reduced by inserting a ground wire between adjacent signal lines, which must be connected to the formation every quarter of a wavelength.

4. Mo te crosstalk mohio, me whakaiti te waahanga koropiko, ana ka whakaaehia, me whakakore te koropiko.

5. Avoid signal sharing loops.

6. Kia tupato ki te tohu pono: me whakatinana e te kaihoahoa nga mutunga o te mahi whakarewa hei whakaoti i te pono o te tohu. Ko nga Kaihoahoa e whakamahi ana i tenei huarahi ka taea te titiro ki te roa o te miihiniiti o te papa parahi parahi kia pai ai te mahi o te pono pono. For systems with dense connectors in the communication structure, the designer can use a PCB as the terminal.

Four, electromagnetic interference

As the speed increases, EMI becomes more and more serious and presents in many aspects (such as electromagnetic interference at interconnects). High-speed devices are particularly sensitive to this and will receive high-speed spurious signals, while low-speed devices will ignore such spurious signals.

There are several ways to eliminate electromagnetic interference in PCB design:

1. Whakaitihia nga koropiko: Ko ia koropiko he rite ki te antena, no reira me whakaiti tatou i te maha o nga koropiko, te waahi o nga koropiko me te hua o te koropiko o nga koropiko. Make sure the signal has only one loop path at any two points, avoid artificial loops and use the power layer whenever possible.

2. Filtering: Filtering can be used to reduce EMI on both the power line and the signal line. There are three methods: decoupling capacitor, EMI filter and magnetic element. EMI filter is shown in Figure 7.

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Whakaatu 7: Nga momo taatari

3. The shielding. Ko te mutunga o te roa o te take me te maha o nga tuhinga arai korero, kore ake he kupu whakataki.

4. Reduce the speed of high-frequency devices.

5. Whakanuia te hiko o te poari PCB, ka aukati i nga waahanga auau nui penei i te raina whakawhiti i te taha o te papa mai i te whiti o waho. Increase the thickness of PCB board, minimize the thickness of microstrip line, can prevent electromagnetic line spillover, can also prevent radiation.

At this point, we can conclude that in hf PCB design, we should follow the following principles:

1. Unification and stability of power supply and ground.

2. Carefully considered wiring and proper terminations can eliminate reflections.

3. Carefully considered wiring and proper terminations can reduce capacitive and inductive crosstalk.

4. Ko te whakakore i te haruru ka tutuki i nga whakaritenga a EMC.