How to realize ESD resistance design of PCB

Static electricity from the human body, the environment and even inside electronic devices can cause various damage to precision semiconductor chips, such as penetrating the thin insulation layer inside components; Damage to the gates of MOSFET and CMOS components; Trigger lock in CMOS device; Short-circuit reverse bias PN junction; Short-circuit positive bias PN junction; Melt the weld wire or aluminum wire inside the active device. In order to eliminate the interference and damage of electrostatic discharge (ESD) to electronic equipment, it is necessary to take a variety of technical measures to prevent.

During PCB board design, ESD resistance of PCB can be realized through layering, proper layout and installation. During the design process, most design changes can be limited to adding or removing components through prediction. By adjusting PCB layout and wiring, ESD can be well prevented. Here are some common precautions.

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How to realize ESD resistance design of PCB

1. Use multi-layer PCB as far as possible. Compared with double-sided PCB, the ground plane and power plane, as well as the close spacing between signal wire and ground wire can reduce the common-mode impedance and inductive coupling, and make it reach 1/10 to 1/100 of the double-sided PCB. Try to place each signal layer close to a power or ground layer. For high-density PCBS with components on both the top and bottom surfaces, very short connections, and lots of ground filling, consider using inner lines.

2. For double-sided PCB, tightly interwoven power supply and ground grid should be used. The power cord is next to the ground and should be connected as much as possible between the vertical and horizontal lines or fill zones. The grid size of one side shall be less than or equal to 60mm, or less than 13mm if possible.

3. Ensure that each circuit is as compact as possible.

4. Put all connectors aside as much as possible.

5. If possible, lead the power cord from the center of the card away from areas that are vulnerable to direct ESD damage.

6, on all PCB layers below the connector leading out of the case (easy to be directly hit by ESD), place wide chassis or polygon filled ground, and connect them together with holes at intervals of approximately 13mm.

7. Place mounting holes on the edge of the card, and the top and bottom pads of open flux are connected to the ground of the chassis around the mounting holes.

8, PCB assembly, do not apply any solder on the top or bottom pad. Use screws with built-in washers to provide tight contact between PCB and metal chassis/shield or support on ground surface.

9, in each layer between the chassis and the circuit ground, to set the same “isolation zone”; If possible, keep the spacing at 0.64mm.

10, in the top and bottom of the card near the installation hole position, every 100mm along the chassis ground and circuit ground with 1.27mm wide line together. Adjacent to these connection points, a pad or mounting hole for installation is placed between the chassis ground and the circuit ground. These ground connections can be cut with a blade to remain open, or jump with magnetic beads/high frequency capacitors.

11, if the circuit board will not be put into the metal box or shielding device, the top and bottom of the circuit board chassis ground wire can not be coated with solder resistance, so that they can be used as ESD arc put electrode.

12. Set a ring around the circuit in the following manner:

(1) In addition to the edge connector and chassis, the entire periphery of the ring access.

(2) Ensure that the width of all layers is greater than 2.5mm.

(3) The holes are connected in a ring every 13mm.

(4) Connect the annular ground and the common ground of the multi-layer circuit together.

(5) For double panels installed in metal cases or shielding devices, the ring ground shall be connected to the common ground of the circuit. The unshielded double-sided circuit should be connected to the ring ground, the ring ground should not be coated with flux, so that the ring ground can act as an ESD discharge rod, at least a 0.5mm wide gap on the ring ground (all layers), so that a large loop can be avoided. Signal wiring should not be less than 0.5mm away from the ring ground.

In the area that can be directly hit by ESD, a ground wire should be laid near each signal line.

14. The I/O circuit should be as close to the corresponding connector as possible.

15. The circuit susceptible to ESD should be placed near the center of the circuit, so that other circuits can provide a certain shielding effect for them.

16, usually placed in series resistor and magnetic beads at the receiving end, and for those cable drivers vulnerable to ESD, can also consider placing a series resistor or magnetic beads at the driver end.

17. Transient protector is usually placed at the receiving end. Use short thick wires (less than 5x width, preferably less than 3x width) to connect to the chassis floor. The signal and ground lines from the connector should be directly connected to the transient protector before the rest of the circuit can be connected.

18. Place the filter capacitor at the connector or within 25mm of the receiving circuit.

(1) Use short and thick wire to connect the chassis or the receiving circuit (length less than 5 times the width, preferably less than 3 times the width).

(2) The signal line and ground wire are first connected to the capacitor and then connected to the receiving circuit.

19. Make sure the signal line is as short as possible.

20. When the length of signal cables is greater than 300mm, a ground cable must be laid in parallel.

21. Ensure that the loop area between the signal line and the corresponding loop is as small as possible. For long signal lines, the position of the signal line and ground line should be changed every few centimeters to reduce the loop area.

22. Drive signals from the center of the network into multiple receiving circuits.

23. Ensure that the loop area between the power supply and the ground is as small as possible. Place a high frequency capacitor near each power pin of the IC chip.

24. Place a high frequency bypass capacitor within 80mm of each connector.

25. Where possible, fill the unused areas with land, connecting all layers of fill at 60mm intervals.

26. Make sure that the ground is connected to the two opposite ends of any large ground fill area (approximately greater than 25mm*6mm).

27. When the length of the opening on the power supply or ground plane exceeds 8mm, connect the two sides of the opening with a narrow line.

28. Reset line, interrupt signal line or edge trigger signal line should not be placed near the edge of PCB.

29. Connect the mounting holes with the circuit common ground, or isolate them.

(1) When the metal bracket must be used with the metal shielding device or chassis, a zero ohm resistance should be used to realize the connection.

(2) determine the size of the mounting hole to achieve the reliable installation of metal or plastic support, in the top and bottom of the mounting hole to use a large pad, the bottom pad can not use flux resistance, and ensure that the bottom pad does not use wave welding process for welding.

30. Protected signal cables and unprotected signal cables cannot be arranged in parallel.

Special attention should be paid to the wiring of reset, interrupt and control signal lines.

(1) High-frequency filtering should be used.

(2) Stay away from input and output circuits.

(3) Keep away from the edge of the circuit board.

32, PCB should be inserted into the chassis, do not install in the opening position or internal joints.

Pay attention to the wiring of the signal line under the magnetic bead, between the pads and may contact the magnetic bead. Some beads conduct electricity quite well and may produce unexpected conductive paths.

If a case or motherboard to install several circuit boards, should be the most sensitive to static electricity circuit board in the middle.