Momwe mungapewere kufalikira kwa chingwe mu liwiro PCB kamangidwe

1. Njira zopondereza kulowererapo kwamagetsi

Njira yabwino yothetsera vuto la kukhulupirika ikuthandizira magwiridwe antchito amagetsi (EMC) a board ya PCB. Chofunika kwambiri ndikuonetsetsa kuti bolodi la PCB lili ndi maziko abwino. Chizindikiro chosanjikiza chomwe chili ndi wosanjikiza pansi ndi njira yothandiza kwambiri pakupanga zovuta. Kuphatikiza apo, kuchepetsa kuchuluka kwa ma siginolo kunja kwa bolodi ndi njira yabwino yochepetsera mphamvu yamagetsi yamagetsi. Njirayi imatha kugwiritsidwa ntchito pogwiritsa ntchito ukadaulo wa “pamwamba” waukadaulo wa PCB. Malo osanjikizawo amakwaniritsidwa powonjezera kuphatikiza kwa zotchinga zochepa ndi ma micropores omwe amagwiritsidwa ntchito kudutsa zigawozi pa PCB wamba. Kukana ndi kuthekera kwake kumatha kuikidwa pansi, ndipo kuchuluka kwake kwa gawo lililonse kumawonjezeredwa kawiri, motero kumachepetsa mphamvu ya PCB. Kuchepetsa kwa dera la PCB kumakhudza kwambiri njira zakuthambo, zomwe zikutanthauza kuti kuzungulira kwamtunduwu kwachepetsedwa, kutalika kwa mayendedwe a nthambi kumachepa, ndipo mphamvu yamagetsi yamagetsi imafanana molingana ndi dera lomwe lilipoli; At the same time, the small size characteristics mean that high-density pin packages can be used, which in turn reduces the length of the wire, thus reducing the current loop and improving emc characteristics.

2. Strictly control the cable lengths of key network cables

If the design has a high speed jump edge, the transmission line effect on the PCB must be considered. Mawotchi othamanga kwambiri ophatikizika omwe amagwiritsidwa ntchito masiku ano ndi ovuta kwambiri. Pali mfundo zina zofunika kuthana ndi vutoli: ngati masekeli a CMOS kapena TTL amagwiritsidwa ntchito popanga, magwiridwe antchito amakhala ochepera 10MHz, ndipo kutalika kwa zingwe sikuyenera kupitirira mainchesi 7. If the operating frequency is 50MHz, the cable length should not be greater than 1.5 inches. Wiring length should be 1 inch if operating frequency reaches or exceeds 75MHz. Kutalika kwakukulu kwa zingwe za GaAs kuyenera kukhala mainchesi 0.3. Izi zikadutsa, pali vuto lamagetsi yotumizira.

3. Konzani moyenera topology ya cabling

Njira inanso yothetsera kufalikira kwa mzere ndikusankha njira yoyenera yolowera. Kapangidwe kazomwe amatchulazi ndi kayendedwe kabungwe kapangidwe kake ka chingwe. Pogwiritsa ntchito zida zamagetsi zothamanga kwambiri, chizindikirocho chokhala ndi m’mbali mosintha kwambiri chimasokonezedwa ndi nthambi za thunthu lazitsulo pokhapokha kutalika kwanthambi kumasungidwa kwambiri. Mwambiri, kuyendetsa kwa PCB kumatengera njira ziwiri zoyambira, zomwe ndi Daisy Chain routing ndi Star yogawa.

Kwa zingwe zomangirira mwamphamvu, zingwe zimayambira kumapeto kwa woyendetsa ndipo zimafika kumapeto kwake kulikonse. Ngati mndandanda wotsutsa wagwiritsidwa ntchito kusintha mawonekedwe azizindikiro, malo azotsutsana akuyenera kukhala pafupi kumapeto kwa kuyendetsa. Daisy chain cabling ndiyabwino kwambiri pakuwongolera kusokonekera kwakukulu kwa ma kabling. Komabe, waya wotereyu ali ndi chiwombankhanga chotsika kwambiri ndipo sikophweka kudutsa 100%. Pakapangidwe kake, tikufuna kupanga kutalika kwa nthambi mu zingwe za Daisy kukhala zazifupi momwe zingathere, ndipo kutalika kwakutali kuyenera kukhala: Stub Delay < = Trt * 0.1.

Mwachitsanzo, nthambi yomwe imathera pama circuits othamanga kwambiri a TTL iyenera kukhala yochepera mainchesi 1.5. Izi zimatenga malo ochepera ndipo zimatha kuthetsedwa ndi cholumikizira chimodzi. Komabe, kapangidwe kalumikizidwe kamene kamapangitsa kuti kulandila kwa olandila mosiyanasiyana sikofanana.

The star topology can effectively avoid the problem of clock signal synchronization, but it is very difficult to finish the wiring manually on the PCB with high density. Kugwiritsa ntchito makina am’manja ndiye njira yabwino kwambiri yomalizira nyenyezi. A terminal resistor is required on each branch. The value of the terminal resistance should match the characteristic impedance of the wire. Izi zitha kuchitidwa pamanja kapena kudzera pazida za CAD kuti muwerenge momwe zimakhalira ndi ma impedance oyenera komanso mawonekedwe otsutsana nawo.

While simple terminal resistors are used in the two examples above, a more complex matching terminal is optional in practice. Njira yoyamba ndi RC match terminal. Zomangamanga zofananira ndi RC zimatha kuchepetsa kugwiritsidwa ntchito kwamagetsi, koma zitha kugwiritsidwa ntchito ngati magwiridwe antchito sanakhazikike. Njirayi ndioyenera kwambiri kuwonetseratu mzere wa wotchi. Chosavuta ndichakuti kuthekera kwa malo ofanana ndi RC kumatha kukhudza mawonekedwe ndi kufalikira kwa chizindikirocho.

The series resistor matching terminal incurs no additional power consumption, but slows down signal transmission. This approach is used in bus-driven circuits where time delays are not significant. Mndandanda wotsutsa wotsutsana nawo uli ndi mwayi wochepetsa chiwerengero cha zipangizo zomwe zimagwiritsidwa ntchito pa bolodi ndi kuchulukana kwa maulumikizidwe.

The final method is to separate the matching terminal, in which the matching element needs to be placed near the receiving end. Ubwino wake ndikuti sigwetsa siginecha, ndipo itha kukhala yabwino kwambiri kupewa phokoso. Amagwiritsidwa ntchito kwambiri pama siginolo olowetsa TTL (ACT, HCT, FAST).

In addition, the package type and installation type of the terminal matching resistor must be considered. SMD surface mount resistors generally have lower inductance than through-hole components, so SMD package components are preferred. There are also two installation modes for ordinary straight plug resistors: vertical and horizontal.

Pogwiritsa ntchito mawonekedwe ofunikira, kukana kuli ndi pini yaying’ono yokwanira, yomwe imachepetsa kukana kwamphamvu pakati pa kukana ndi bolodi la dera ndikupangitsa kuti kutentha kukana kutuluke mlengalenga. Koma kuyika kwakanthawi kotalikirapo kumakulitsa kutulutsa kwa resistor. Kukhazikitsa kopingasa kumachepetsa chifukwa chotsitsa pang’ono. However, the overheated resistance will drift, and in the worst case, the resistance will become open, resulting in PCB wiring termination matching failure, becoming a potential failure factor.

4. Njira zina zogwirira ntchito

Pofuna kuchepetsa kuthamanga kwakanthawi kwakanthawi pamagetsi a IC, decoupling capacitor iyenera kuwonjezeredwa ku chip cha IC. Izi zimachotsa bwino zovuta za ma burr pamagetsi ndikuchepetsa ma radiation kuchokera pachingwe chamagetsi paboard yosindikizidwa.

Kuwongolera kwa burr kumakhala bwino kwambiri pamene decoupling capacitor yolumikizidwa molunjika ku mwendo wamagetsi wamagawo ophatikizika osati m’malo osanjikiza magetsi. Ichi ndichifukwa chake zida zina zimakhala ndi zotsekemera m’matumba awo, pomwe zina zimafuna mtunda pakati pa decoupling capacitor ndi chipangizocho kukhala chochepa mokwanira.

Zipangizo zilizonse zothamanga kwambiri komanso zamagetsi zazikulu ziyenera kuyikidwa limodzi momwe zingathere kuti muchepetse kupitilira kwakanthawi kwamagetsi amagetsi.

Popanda chingwe chamagetsi, zingwe zazitali zamagetsi zimapanga kuzungulira pakati pa siginolo ndi kuzungulira, kumakhala gwero la radiation ndi dera loyendetsa.

Kulumikizana kopanga chingwe chomwe sichidutsa pa intaneti yomweyo kapena china chilichonse chotchedwa open loop. Chingwecho chikadutsa pa chingwe chomwecho, njira zina zimatseka zotseka. Pazochitika zonsezi, mphamvu ya antenna (mzere wa antenna ndi antenna ya mphete) imatha kuchitika.