He maha nga huarahi hei whakaoti rapanga EMI. Ko nga tikanga aukati EMI o naianei ko: te whakamahi i nga paninga aukati EMI, te kowhiri i nga waahanga aukati EMI tika, me te hoahoa whaihanga EMI. Ka timata mai i te tino taketake PCB layout, this article discusses the role and design techniques of PCB layered stacking in controlling EMI radiation.

Ma te tika te whakanoho i nga puritanga e tika ana te kaha ki te taha o nga titi whakangao hiko o te IC ka tere ake te peke o te ngaohiko putanga IC. Heoi, karekau te raruraru e mutu i konei. Na te iti o te whakautu auau o nga puritanga, na tenei ka kore e taea e nga kaitarai te whakaputa i te mana orooro e hiahiatia ana hei peia te putanga IC i roto i te roopu auau katoa. I tua atu, ko te ngaohiko whakawhiti i hangaia i runga i te pae pahi hiko ka hanga he maturuturu ngaohiko puta noa i te inductor o te ara wehe. Ko enei ngaohiko whakawhiti ko te aratau nui noa nga puna pokanoa EMI. Me pehea tatou ki te whakaoti i enei raruraru?

Mo te taha ki te IC i runga i ta maatau poari porowhita, ko te paparanga hiko huri noa i te IC ka taea te kii he punga hiko teitei pai rawa atu, ka taea te kohi i te waahanga o te hiko i pataihia e te punga motuhake e whakarato ana i te kaha teitei mo te ma. putanga. I tua atu, me iti te inductance o te paparanga mana pai, no reira he iti ano te tohu whakawhiti i hangaia e te inductance, na reira ka whakaiti i te aratau EMI noa.

Of course, the connection between the power layer and the IC power pin must be as short as possible, because the rising edge of the digital signal is getting faster and faster, and it is best to connect it directly to the pad where the IC power pin is located. This needs to be discussed separately.

Hei whakahaere i te EMI aratau noa, me awhina te waka rererangi hiko ki te wehe me te iti o te whakaurunga. Ko tenei rererangi hiko me pai te hoahoa o nga rererangi hiko. Ka patai pea tetahi, he pehea te pai? Ko te whakautu ki te patai kei runga i te paparanga o te hiko, nga rauemi i waenga i nga paparanga, me te auau mahi (ara, he mahi o te wa piki o te IC). Ko te tikanga, ko te mokowhiti o te paparanga mana ko te 6mil, ko te interlayer he rauemi FR4, ko te kaha rite o te paparanga mana mo ia inihi tapawha he 75pF. Ma te mohio, ka iti ake te mokowhiti o te paparanga, ka nui ake te kaha.

There are not many devices with a rise time of 100 to 300 ps, ​​but according to the current IC development speed, devices with a rise time in the range of 100 to 300 ps will occupy a high proportion. For circuits with a rise time of 100 to 300ps, 3mil layer spacing will no longer be suitable for most applications. At that time, it was necessary to use layering technology with a layer spacing of less than 1 mil, and to replace FR4 dielectric materials with materials with high dielectric constants. Now, ceramics and ceramic plastics can meet the design requirements of 100 to 300 ps rise time circuits.

Ahakoa ka whakamahia pea nga rauemi hou me nga tikanga hou a meake nei, mo nga huringa taima piki 1 ki te 3ns o tenei ra, 3 ki te 6mil mokowhiti papa me nga rauemi dielectric FR4, ko te nuinga o te waa e ranea ana ki te hapai i nga orite teitei me te whakaiti i te tohu whakawhiti. , ara , Ka taea e te aratau noa EMI te whakaheke i te iti rawa. Ko nga tauira hoahoa paparanga paparanga PCB kua hoatu i roto i tenei tuhinga ka mau te mokowhiti paparanga o te 3 ki te 6 mils.

Te whakangungu rakau hiko

From the perspective of signal traces, a good layering strategy should be to put all signal traces on one or more layers, these layers are next to the power layer or ground layer. For the power supply, a good layering strategy should be that the power layer is adjacent to the ground layer, and the distance between the power layer and the ground layer is as small as possible. This is what we call the “layering” strategy.

PCB tāpae

He aha te momo rautaki tapae ka awhina i te whakangungu me te pehi i te EMI? Ko te kaupapa paparanga paparanga e whai ake nei e kii ana ka rere te hiko hiko i runga i te paparanga kotahi, ka tohatohahia te ngaohiko kotahi, ngaohiko maha ranei ki nga wahanga rereke o te paparanga kotahi. Ko te take o nga paparanga mana maha ka korerohia i muri mai.

4-papa papa

He maha nga raru e pa ana ki te hoahoa papa-papa 4. Ko te tuatahi, ko te papa tawhito e wha-papa me te matotoru o te 62 mils, ahakoa ko te paparanga tohu kei runga i te paparanga o waho, a ko te mana me te papa whenua kei runga i te paparanga o roto, ko te tawhiti i waenganui i te paparanga mana me te paparanga whenua. he nui tonu.

Mena ko te hiahia utu ko te tuatahi, ka taea e koe te whakaaro ki nga waahanga e rua e whai ake nei ki te papa 4-papa tawhito. Ka taea e enei otinga e rua te whakapai ake i te mahi o te aukati EMI, engari e tika ana mo nga tono kei te iti rawa te kiato o te waahanga o te papa, a he nui te waahi huri noa i nga waahanga (tuhia te paparanga parahi mana e hiahiatia ana).

The first option is the first choice. The outer layers of the PCB are all ground layers, and the middle two layers are signal/power layers. The power supply on the signal layer is routed with a wide line, which can make the path impedance of the power supply current low, and the impedance of the signal microstrip path is also low. From the perspective of EMI control, this is the best 4-layer PCB structure available. In the second scheme, the outer layer uses power and ground, and the middle two layers use signals. Compared with the traditional 4-layer board, the improvement is smaller, and the interlayer impedance is as poor as the traditional 4-layer board.

Mena kei te pirangi koe ki te whakahaere i te impedance tohu, me tino tupato te kaupapa tapae i runga ake nei ki te whakarite i nga tohu i raro i te mana me nga motu parahi whenua. I tua atu, ko nga moutere parahi i runga i te hiko hiko, i te paparanga whenua ranei me hono atu kia taea ai te whakarite i te hononga DC me te iti-auau.

6-papa papa

Mena he teitei te kiato o nga waahanga o te papa paparanga 4, he pai ake te papa 6-papa. Heoi ano, ko etahi o nga kaupapa taapu i roto i te hoahoa papa-papa 6 kaore i te pai ki te whakamarumaru i te papa hiko, a he iti noa te paanga ki te whakahekenga o te tohu whakawhiti o te pahi hiko. E rua nga tauira ka korerohia i raro nei.

In the first case, the power supply and ground are placed on the 2nd and 5th layers respectively. Because of the high impedance of the copper coating of the power supply, it is very unfavorable to control the common mode EMI radiation. However, from the point of view of signal impedance control, this method is very correct.