Lati rii daju didara gbigbe ifihan agbara, dinku kikọlu EMI, ki o kọja iwe-ẹri idanwo impedance ti o yẹ, PCB bọtini ifihan ikọjujasi ibaamu oniru wa ni ti beere. Itọsọna apẹrẹ yii da lori awọn iṣiro iṣiro ti o wọpọ, awọn abuda ifihan ọja ọja TV, awọn ibeere Layout PCB, iṣiro sọfitiwia SI9000, alaye esi olupese PCB ati bẹbẹ lọ, ati nikẹhin wa si apẹrẹ ti a ṣeduro. Suitable for most PCB suppliers’ process standards and PCB board designs with impedance control requirements.

Ọkan. Double nronu impedance design

① Apẹrẹ ilẹ: iwọn ila, aye 7/5 / 7mil iwọn okun waya ilẹ ≥20mil ifihan agbara ati ijinna waya ilẹ 6mil, gbogbo iho ilẹ 400mil; (2) Non-enveloping design: line width, spacing 10/5/10mil difference pair and the distance between the pair ≥20mil (special circumstances can not be less than 10mil) it is recommended that the whole group of differential signal line using enveloping shielding, differential signal and shielding ground distance ≥35mil (special circumstances can not be less than 20mil). 90 ohm impedance iyatọ ti a ṣe iṣeduro apẹrẹ

Iwọn laini, aaye 10/5/10mil Iwọn okun waya ilẹ ≥20mil Signal ati ijinna waya ilẹ ti 6mil tabi 5mil, iho ilẹ ni gbogbo 400mil; ②Maṣe pẹlu apẹrẹ naa:

Line width and spacing 16/5/16mil the distance between the differential signal pair ≥20mil it is recommended that ground enveloping be used for the whole group of differential signal cables. The distance between the differential signal and the shielded ground cable must be ≥35mil (or ≥20mil in special cases). Awọn aaye akọkọ: fifun ni pataki si lilo apẹrẹ ilẹ ti a bo, laini kukuru ati ọkọ ofurufu pipe le ṣee lo laisi apẹrẹ ilẹ ti a bo; Iṣiro sile: Awo FR-4, awo sisanra 1.6mm +/- 10%, awo dielectric ibakan 4.4+/-0.2, Ejò sisanra 1.0 iwon (1.4mil) solder epo sisanra 0.6 ± 0.2mil, dielectric ibakan 3.5 +/-0.3.

Impedance design of two and four layers

100 ohm differential impedance recommended design line width and spacing 5/7/5mil the distance between pairs ≥14mil(3W criterion) note: it is recommended that ground enveloping be used for the whole group of differential signal cables. The distance between the differential signal and the shielding ground cable should be at least 35mil (not less than 20mil in special cases). Imudani iyatọ 90ohm Iṣeduro iwọn ila apẹrẹ ati aye 6/6/6mil Iyatọ meji ijinna ≥12mil(3W criterion) Awọn aaye akọkọ: Ninu ọran ti okun meji iyatọ gigun, o gba ọ niyanju pe aaye laarin awọn ẹgbẹ meji ti laini iyatọ USB fi ipari si ilẹ nipasẹ 6mil lati dinku eewu EMI (fi ipari si ilẹ ki o ma fi ipari si ilẹ, iwọn ila ati boṣewa ijinna laini jẹ ibamu). Awọn paramita Iṣiro: Fr-4, sisanra awo 1.6mm +/- 10%, awo dielectric ibakan 4.4+/-0.2, Ejò sisanra 1.0oz (1.4mil) ologbele-iwosan dì (PP) 2116 (4.0-5.0mil), dielectric ibakan 4.3+/ -0.2 solder epo sisanra 0.6 ± 0.2mil, Dielectric ibakan 3.5+/- 0.3 laminated be: iboju titẹ sita Layer solder Layer Ejò Layer ologbele-iwosan fiimu ti a bo Ejò sobusitireti ologbele-iwosan fiimu Ejò Layer solder Layer iboju titẹ sita Layer

Mẹta. Six Layer ọkọ impedance design

Ilana lamination mẹfa-Laye yatọ fun awọn iṣẹlẹ oriṣiriṣi. Itọsọna yii ṣe iṣeduro apẹrẹ ti lamination ti o wọpọ diẹ sii (wo FIG. 2), ati awọn apẹrẹ ti a ṣe iṣeduro wọnyi da lori data ti o gba labẹ lamination ni FIG. 2. Apẹrẹ ikọjujasi ti ita ita jẹ kanna bi ti igbimọ Layer mẹrin. Nitoripe akojọpọ inu ni gbogbogbo ni awọn ipele ọkọ ofurufu diẹ sii ju Layer dada lọ, agbegbe itanna eleto yatọ si Layer dada. Awọn atẹle jẹ awọn didaba fun iṣakoso ikọjusi ti Layer kẹta ti onirin (itọkasi ti a ti laminated Figure 4). 90 ohm impedance iyatọ ti a ṣe iṣeduro Iwọn laini apẹrẹ, ijinna laini 8/10 / 8mil Iyatọ bata ijinna ≥20mil (ipin 3W); Awọn paramita Iṣiro: Fr-4, sisanra awo 1.6mm +/- 10%, awo dielectric ibakan 4.4+/-0.2, Ejò sisanra 1.0oz (1.4mil) ologbele-iwosan dì (PP) 2116 (4.0-5.0mil), dielectric ibakan 4.3+/ -0.2 solder epo sisanra 0.6 ± 0.2mil, Dielectric ibakan 3.5+/- 0.3 laminated be: oke iboju ìdènà Layer Ejò Layer ologbele-iwosan Ejò-ti a bo sobusitireti ologbele-iwosan Ejò-bo sobusitireti ologbele-iwosan Ejò-ti a bo Layer isalẹ iboju ìdènà Layer

Fun diẹ ẹ sii ju awọn ipele mẹrin tabi mẹfa, jọwọ ṣe apẹrẹ funrararẹ ni ibamu si awọn ofin to wulo tabi kan si awọn oṣiṣẹ ti o yẹ lati pinnu eto lamination ati ero onirin.

5. Ti awọn ibeere iṣakoso impedance miiran ba wa nitori awọn ipo pataki, jọwọ ṣe iṣiro funrararẹ tabi kan si awọn oṣiṣẹ ti o yẹ lati pinnu ero apẹrẹ

Akiyesi: ① Ọpọlọpọ awọn ọran lo wa ti o kan ikọlu naa. Ti PCB nilo lati ṣakoso nipasẹ ikọlu, awọn ibeere ti iṣakoso ikọlu yẹ ki o wa ni samisi ni kedere ninu data apẹrẹ PCB tabi iwe ayẹwo; (2) 100 ohm impedance iyatọ ti wa ni akọkọ lo fun HDMI ati awọn ifihan agbara LVDS, ninu eyiti HDMI nilo lati kọja iwe-ẹri ti o yẹ jẹ dandan; ③ 90 ohm impedance iyato ti wa ni o kun lo fun USB ifihan agbara; (4) Iyasọtọ 50 ohm-ẹyọkan ni a lo fun apakan ti ifihan agbara DDR. Niwọn igba ti ọpọlọpọ awọn patikulu DDR gba apẹrẹ ikọlu ti iṣatunṣe atunṣe inu inu, apẹrẹ naa da lori igbimọ Ririnkiri ti a pese nipasẹ ile-iṣẹ ojutu bi itọkasi, ati itọsọna apẹrẹ yii ko ṣeduro. ⑤, impedance 75-ohm-opin kan jẹ lilo ni pataki fun titẹ sii fidio analog ati iṣelọpọ. Agbara 75-ohm kan wa ti o baamu resistance ilẹ lori apẹrẹ Circuit, nitorinaa ko ṣe pataki lati gbe apẹrẹ ibaramu impedance ni Layout PCB, ṣugbọn o yẹ ki o ṣe akiyesi pe 75-ohm resistance resistance ni ila yẹ ki o gbe sunmọ si pinni ebute. Wọpọ lo PP.