Can you understand PCB cascade design

The number of layers of PCB depends on the complexity of the poari porowhita. Mai i te tirohanga o te tukatuka PCB, he maha nga paparanga PCB e hangaia ana mo te maha o te “PCB panui takirua” na roto i te mahi puranga me te taumaha. However, the number of layers, stacking sequence and board selection of multi-layer PCB are determined by the PCB designer, which is called “PCB stacking design”.

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Factors to be considered in PCB cascade design

The number of layers and layering of a PCB design depends on the following factors:

1. Hardware cost: The number of PCB layers is directly related to the final hardware cost. The more layers there are, the higher the hardware cost will be.

2. Wiring of high-density components: high-density components represented by BGA packaging devices, the wiring layers of such components basically determine the wiring layers of the PCB board;

3. Signal quality control: for PCB design with high speed signal concentration, if the focus is on signal quality, it is required to reduce the wiring of adjacent layers to reduce the crosstalk between signals. At this time, the ratio of wiring layers and reference layers (Ground layer or Power layer) is best 1:1, which will cause the increase of PCB design layers. Conversely, if the signal quality control is not mandatory, the adjacent wiring layer scheme can be used to reduce the number of PCB layers;

4. Whakamaatau tohu tohu Pangarau: Ma te tautuhi tohu Maatau e tohu mena he maeneene nga waea PCB. Ko te whakamaaramatanga tohu tohu koretake ka arahi ki te kore waea PCB hape me te whakanui ake i nga paparanga waea.

5. PCB manufacturer’s processing capacity baseline: the stacking design scheme (stacking method, stacking thickness, etc.) given by PCB designer must take full account of PCB manufacturer’s processing capacity baseline, such as processing process, processing equipment capacity, commonly used PCB plate model, etc.

PCB cascading design requires prioritizing and balancing all of the above design influences.

General rules for PCB cascade design

1. The formation and the signal layer should be tightly coupled, which means that the distance between the formation and the power layer should be as small as possible, and the thickness of the medium should be as small as possible, so as to increase the capacitance between the power layer and the formation (if you don’t understand here, you can think of the capacitance of the plate, the size of the capacitance is inversely proportional to the spacing).

2, two signal layers as far as possible not directly adjacent, so easy to signal crosstalk, affect the performance of the circuit.

3, mo te poari taiawhio maha-papa, penei i te papa paparanga 4, te papa papa 6, nga whakaritenga whanui mo te papa tohu tae atu ki te taea me te paparanga hiko o roto (paparanga paparanga hiko ranei) e tata ana, kia taea ai e koe te whakamahi i te nui te waahanga o te konganuku kapi hiko parahi hei mahi ki te whakangungu i te papa tohu, kia pai ai te karo i te whakawhiti i waenga i te papa tohu.

4. For the high-speed signal layer, it is generally located between two internal electrical layers. The purpose of this is to provide an effective shielding layer for high-speed signals on the one hand, and to limit high-speed signals between two internal electrical layers on the other hand, so as to reduce the interference of other signal layers.

5. Whakaarohia te hangarite o te anga takahuri.

6. Ma te maha o nga paparanga hiko a roto e ahei ai te whakaheke i te korenga o te papa.

Recommended cascading structure

1, the high frequency wiring cloth in the top layer, in order to avoid the use of high frequency wiring to the hole and induction inductance. The data lines between the top isolator and the transmitting and receiving circuit are directly connected by high frequency wiring.

2. Ka whakauruhia he papa rererangi ki raro i te raina tohu auau nui hei whakahaere i te aukati o te raina hononga whakawhiti, me te whakarato i tetahi ara koretake rawa mo te rerenga hokinga mai kia rere.

3. Place the power supply layer under the ground layer. Ko nga paparanga tohutoro e rua he kaiwhakaputa hf neke atu i te 100pF / INCH2.

4. Ko nga tohu whakahaere tere-tere kua whakaritehia i nga waea hiko o raro. Ko enei raina he tohu nui ake hei tu atu i nga aukati koretake e ahu mai ana i nga rua, na te mea ka nui ake te ngawari.

Can you understand PCB cascade design

▲ E wha-papanga tauira hoahoa pereti whakarahi

Mena ka hiahiatia etahi atu waahanga mana (Vcc), nga tohu tohu ranei, ko te waahanga tuarua o te hiko / apa hei hono hangarite. In this way, the laminated structure is stable and the boards won’t warp. Ko nga paparanga mana me nga hiko rereke kia tata ki te hanganga ki te whakanui ake i te kaha o te pehanga huringa teitei na te aukati i te haruru.