Akselere ak amelyore metòd fil elektrik PCB yo

Pkb wiring methods continue to improve, and flexible wiring techniques can reduce wire length and free up more PCB space. Konvansyonèl fil elektrik limite pa kowòdone fil fiks ak mank de fil abitrèman Incline. Retire limit sa yo ka siyifikativman amelyore kalite fil elektrik.

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Let’s start with some terminology. Nou defini fil kouran abitrè kòm fil kouran fil k ap itilize segman ang abitrè ak radyan. Li se yon kalite fil elektrik, men se pa sa sèlman itilize sèlman 90 degre ak 45 degre segman liy Ang. Topological wiring is wire wiring that does not adhere to grids and coordinates and does not use regular or irregular grids like shape-based wiring. Se pou nou defini tèm fil elektrik la kòm fil elektrik san fòm fiks ki pèmèt rekalkile fòm fil an tan reyèl pou reyalize posiblite transfòmasyon sa yo. Se sèlman ark soti nan obstak ak tanjant komen yo yo te itilize yo fòme fòm nan liy. (Obstacles include pins, copper foil, forbidden areas, holes and other objects) part of the circuit of two PCB models. Fil vèt ak wouj yo kouri sou diferan kouch modèl PCB la. The blue circles are the perforations. The red element is highlighted. There are also some red round pins. Use only line segments and models with an Angle of 90 degrees between them. Figi 1B se yon modèl PCB lè l sèvi avèk ark ak ang abitrè. Wiring at any Angle may seem strange, but it does have many advantages. The way it is wired is very similar to how engineers wired it by hand half a century ago. Montre yon PCB reyèl devlope nan 1972 pa yon konpayi Ameriken ki rele Digibarn pou fil elektrik men konplè. This is a PCB board based on Intel8008 computer. Fil kouran abitrè Ang ki montre nan Figi 2 la aktyèlman menm jan an. Why would they use arbitrary Angle wiring? Paske sa a ki kalite fil elektrik gen anpil avantaj. Arbitrary Angle wiring has many advantages. First, not using the angles between line segments saves PCB space (polygons always take up more space than tangents). Traditional automatic cablers can place only three wires between adjacent components (see left and center in Figure 3). Sepandan, lè fil elektrik nan nenpòt ki Ang, gen ase espas kouche 4 fil sou menm chemen an san yo pa vyole règleman konsepsyon tcheke (DRC). Sipoze nou gen yon chip mòd pozitif epi ou vle konekte broch yo chip nan de lòt broch. Using only 90 degrees takes up a lot of space. Sèvi ak fil elektrik abitrè Ang ka diminye distans ki genyen ant chip la ak broch lòt, pandan y ap diminye anprint la. In this case, the area was reduced from 30 square centimeters to 23 square centimeters. Rotating the chip at any Angle can also provide better results. In this case, the area was reduced from 23 square centimeters to 10 square centimeters. It shows a real PCB. Arbitrary Angle wiring with rotating chip function is the only wiring method for this circuit board. Sa a se pa sèlman yon teyori, men tou, yon solisyon pratik (pafwa sèlman solisyon an posib). Shows an example of a simple PCB. Rezilta kablè topoloji, pandan y ap rezilta kablè otomatik ki baze sou fòm optimal yo se foto PCB aktyèl la. An automatic cabler based on optimal shape cannot do this because the components are rotated at arbitrary angles. Ou bezwen plis zòn, epi si ou pa Thorne eleman yo, aparèy la dwe vin pi gwo. Layout performance would be greatly improved without parallel segments, which are often a source of crosstalk. The level of crosstalk increases linearly as the length of parallel wires increases. As the spacing between parallel wires increases, crosstalk decreases quadratic. Let’s set the level of crosstalk produced by two parallel 1mm wires spaced d to e. Si gen yon Ang ant segman yo fil, Lè sa a, tankou sa a Ang ogmante, nivo nan kwazyè pral diminye. The crosstalk does not depend on the length of the wire, but only on the Angle value: where α represents the Angle between the wire segments. Consider the following three wiring methods. On the left side of Figure 8 (90 degree layout), there is the maximum wire length and the maximum emi value due to parallel line segments. In the middle of Figure 8 (45 degree layout), the wire length and emi values are reduced. On the right-hand side (at any Angle), the wire length is shortest and there are no parallel wire segments, so the interference value is negligible. So arbitrary Angle wiring helps to reduce the total wire length and significantly reduce electromagnetic interference. You also remember the effect on signal delay (conductors should not be parallel and should not be perpendicular to the PCB fiberglass). Advantages of flexible wiring Manual and automatic movement of components does not destroy the wiring in flexible wiring. Kablè a otomatikman kalkile fòm ki pi bon nan fil la (pran an kont clearance sekirite ki nesesè). Flexible cabling can therefore greatly reduce the time required to edit the topology, nicely supporting multiple recabling to meet constraints. Sa a montre yon konsepsyon PCB ki deplase nan twou ak pwen branch. During automatic movement, wire branch points and through-holes are adjusted to the optimal position. In most computer-aided design (CAD) systems, the wiring interconnection problem is reduced to the problem of sequentially finding paths between pairs of points in a maze of pads, forbidden areas, and laid wires. Lè yo jwenn yon chemen, li fiks epi li vin yon pati nan labirent la. Dezavantaj nan fil elektrik sekans se ke rezilta a fil elektrik ka depann sou lòd la fil elektrik. Lè bon jan kalite topolojik toujou lwen pafè, pwoblèm nan nan “kole” rive nan lokalman ti zòn nan. But no matter which wire you rewire, it’s not going to improve the quality of the wiring. This is a serious problem in all CAD systems using sequential optimization. This is where the bending elimination process is useful. Fil koube refere a fenomèn nan ke yon fil nan yon rezo dwe mache otou yon objè sou yon lòt rezo jwenn aksè nan yon objè. Rewiring a wire will not correct this. Yo montre yon egzanp koube. A lit red wire travels around a pin in the other network, and an unlit red wire connects to this pin. Rezilta otomatik otomatik yo parèt. In the second case (on another layer), a lighted green wire is automatically rewired by changing the wiring layer (from green to red). Eliminate wire bending by automatically optimizing wire shape (approximate arcs with line segments just to show any Angle examples without arcs). (top) original design, (bottom) after eliminating bending design. Fil wouj Bent yo make. Nan yon pyebwa Steiner, tout liy yo dwe konekte kòm segman ak somè (pwen final ak testaman). Nan tèt chak nouvo somè, twa segman dwe konvèje e pa plis pase twa segman dwe fini. The Angle between the line segments that converge to the vertex shall not be less than 120 degrees. It is not very difficult to construct a Steiner with these sufficient conditional properties, but it is not necessarily minimal. Gray Steiner trees are not optimal, but black Steiner trees are. Nan konsepsyon kominikasyon pratik, diferan kalite obstak yo dwe konsidere. Yo limite kapasite pou konstwi pyebwa spanning minimòm lè l sèvi avèk tou de algorithm ak pye bwa Steiner lè l sèvi avèk metòd jewometrik. The obstacles are shown in gray and we recommend starting at any end vertex. If there is more than one adjacent terminating vertex, you should choose one that allows you to continue using the second vertex. It depends on the Angle. Mekanis prensipal la isit la se yon algorithm fòs ki baze sou ki kalkile fòs yo aji sou somè yo nouvo ak repete deplase yo nan yon pwen ekilib (grandè a ak direksyon fòs yo depann sou fil yo nan pwen yo branch adjasan). Si Ang ki genyen ant yon pè segman liy ki konekte nan yon somè (tèminal oswa adisyon) se mwens pase 120 degre, yo ka ajoute yon pwen branch, ak Lè sa a, yon algorithm mekanik ka itilize yo optimize pozisyon nan somè. It’s worth noting that simply sorting all angles in descending order and adding new vertices in that order doesn’t work, and the result is worse. After adding a new node, you should check the minimum of a subnet consisting of four pins:

1. If a vertex is added to the vicinity of another newly added vertex, check for the smallest four-pin network.

2. If the four-pin network is not minimal, select a pair of “diagonal” (belonging to the quadrilateral diagonal) endpoints or virtual terminal nodes (virtual terminal nodes – wire bends).

3. The line segment that connects the endpoint (virtual endpoint) to the nearest new vertex is replaced by the line segment that connects the endpoint (virtual endpoint) to the distant new vertex.

4. Use mechanical algorithms to optimize vertex positions.

This method does not guarantee to build the smallest network, but compared with other methods, it can achieve the smallest network length without grazing. Li pèmèt tou pou zòn kote koneksyon final yo entèdi, ak kantite nœuds final ka abitrè.

Flexible wiring at any Angle has some other interesting advantages. For example, if you can automatically move many objects with the help of automatic real-time wire shape recalculation, you can create parallel serpentine lines. This cabling method makes better use of space, minimizes the number of iterations, and allows for flexible use of tolerances. If there are two serpentine lines interlaced with each other, the automatic cabler will reduce the length of one or both, depending on rule priority.

Consider the wiring of BGA components. In the traditional peripheral-to-center approach, the number of channels to the periphery is reduced by 8 with each successive layer (due to a reduction in perimeter). For example, a 28x28mm component with 784 pins requires 10 layers. Some of the layers in the diagram have escaped wiring. Figi 16 montre yon ka nan yon BGA. At the same time, when using the “center to periphery” wiring method, the number of channels required to exit to the periphery does not change from layer to layer. Sa a pral redwi anpil nan kouch. Pou yon gwosè eleman nan 28x28mm, 7 kouch yo ase. Pou pi gwo konpozan, li nan yon genyen-genyen. Figure 17 shows a quarter of the BGA. An example of BGA wiring is shown. When using the “center to periphery” cabling approach, we can complete the cabling of all networks. Abitrè Ang topolojik kabl otomatik ka fè sa. Traditional automatic cablers cannot route this example. Shows an example of a real PCB where the engineer reduced the number of signal layers from 6 to 4 (compared to the specification). In addition, it took engineers only half a day to complete the wiring of the PCB.