Met die toename van geïntegreerde stroombaan uitset skakel spoed en PCB-bord density, Signal Integrity has become one of the issues that must be concerned in high-speed digital PCB design. The parameters of components and PCB board, the layout of components on PCB board, the wiring of high-speed Signal line and other factors, Can cause problems with signal integrity.

For PCB layouts, signal integrity requires a board layout that does not affect signal timing or voltage, while for circuit wiring, signal integrity requires termination elements, layout strategies, and wiring information. Hoë seinspoed op ‘n PCB, verkeerde plasing van eindkomponente, of verkeerde bedrading van hoëspoed seine kan seinintegriteitprobleme veroorsaak, wat kan veroorsaak dat die stelsel verkeerde data uitstuur, die stroombaan onbehoorlik werk of glad nie werk nie. How to take signal integrity into full consideration and take effective control measures in PCB design has become a hot topic in PCB design industry.

Signal integrity Problem Good signal integrity means that the signal can respond with the correct timing and voltage level values when required. Omgekeerd, wanneer die sein nie behoorlik reageer nie, is daar ‘n seinintegriteitsprobleem. Signal integrity problems can lead to or directly lead to signal distortion, timing errors, incorrect data, address and control lines, and system misoperation, or even system crash. In die proses van PCB-ontwerppraktyke het mense baie PCB-ontwerpreëls opgehoop. In PCB design, the signal integrity of PCB can be better achieved by carefully referring to these design rules.

When designing PCB, we should first understand the design information of the whole circuit board, which mainly includes:

1. The number of devices, device size, device package, chip rate, whether PCB is divided into low speed, medium speed and high speed area, which is the interface input and output area;

2. The overall layout requirements, device layout location, whether there is a high power device, chip device heat dissipation special requirements;

3. Soort seinlyn, spoed en transmissierigting, impedansiebeheervereistes van seinlyn, rigting bus en spoed, ritsituasie, sleutelseine en beskermingsmaatreëls;

4. Tipe kragtoevoer, tipe grond, geraastoleransievereistes vir kragtoevoer en grond, instelling en segmentering van kragtoevoer en grondvlak;

5. Tipes en tariewe van kloklyne, bron en rigting van kloklyne, klokvertragingsvereistes, langste lynvereistes.

PCB-gelaagde ontwerp

Nadat u die basiese inligting van die printplaat verstaan ​​het, is dit nodig om die ontwerpvereistes van die printplaatkoste en seinintegriteit te weeg en ‘n redelike aantal bedradingslae te kies. At present, the circuit board has gradually developed from single layer, double layer and four layer to more multi-layer circuit board. Multi-layer PCB design can improve the reference surface of signal routing and provide backflow path for signal, which is the main measure to achieve good signal integrity. When designing PCB layering, follow the following rules:

1. Die verwysingsvlak moet verkieslik die grondvlak wees. Both power supply and ground plane can be used as reference plane, and both have certain shielding function. Die afskermeffek van die kragtoevoervlak is egter baie laer as dié van die grondvlak as gevolg van sy hoër kenmerkende impedansie en groter potensiaalverskil tussen die kragtoevoervlak en die verwysingsgrondvlak.

2. Digital circuit and analog circuit are layered. Waar ontwerpkoste dit toelaat, is dit die beste om digitale en analoog stroombane op aparte lae te rangskik. If must want to arrange in same wiring layer, can use ditch, add earthing line, the method such as dividing line to remedy. Analoog en digitale krag en grond moet geskei word, nooit gemeng nie.

3. Die sleutelseinroetering van aangrensende lae kruis nie die segmenteringsarea nie. Seine vorm ‘n groot seinlus oor die hele streek en genereer sterk straling. If the signal cable must cross the area when the ground cable is divided, a single point can be connected between the ground to form a connection bridge between the two ground points, and then the cable can be routed through the connection bridge.

4. Daar moet ‘n relatief volledige grondvlak onder die komponentoppervlak wees. Die integriteit van die grondvlak moet so ver moontlik vir die meerlaagplaat gehandhaaf word. Geen seinlyne word normaalweg toegelaat om in die grondvlak te loop nie.

5, hoë frekwensie, hoë spoed, klok en ander sleutel seinlyne moet aangrensende grondvlak hê. In this way, the distance between signal line and ground line is only the distance between PCB layers, so the actual current always flows in the ground line directly below the signal line, forming the smallest signal loop area and reducing radiation.

How to design the signal of integrity PCB

PCB layout design

Die sleutel van seinintegriteitontwerp van gedrukte bord is uitleg en bedrading, wat direk verband hou met die werkverrigting van PCB. Prior to layout, the PCB size must be determined to meet the function at the lowest possible cost. As die PCB te groot en versprei is, kan die transmissielyn baie lank wees, wat lei tot verhoogde impedansie, verminderde geraasweerstand en verhoogde koste. If the components are placed together, heat dissipation is poor, and coupling crosstalk may occur in adjacent wiring. Daarom moet die uitleg gebaseer wees op die funksionele eenhede van die stroombaan, met inagneming van elektromagnetiese verenigbaarheid, hitteafvoer en koppelvlakfaktore.

When laying out a PCB with mixed digital and analog signals, do not mix digital and analog signals. As analoog en digitale seine gemeng moet word, maak seker dat jy vertikaal lyn om die effek van kruiskoppeling te verminder. Die digitale stroombaan, analoogkring en ruisopwekkende stroombaan op die kring moet geskei word en die sensitiewe stroombaan moet eers gelei word, en die koppelpad tussen die stroombane moet uitgeskakel word. In die besonder, oorweeg die klok, herstel en onderbreek lyne, moenie hierdie lyne parallel met die hoë stroom skakel lyne, anders maklik beskadig deur elektromagnetiese koppeling seine, veroorsaak onverwagte herstel of onderbreking. The overall layout should follow the following principles:

1. Funksionele partisie-uitleg, analoog stroombaan en digitale stroombaan op PCB moet verskillende ruimtelike uitleg hê.

2. Volgens die stroombaan sein proses die funksionele stroombaan eenhede te rangskik, sodat die sein vloei dieselfde rigting te handhaaf.

3. Take the core components of each functional circuit unit as the center, and other components are arranged around it.

4. Shorten the connection between high-frequency components as much as possible and try to reduce their distribution parameters.

5. Easily disturbed components should not be too close to each other, input and output components should be far away.

How to design the signal of integrity PCB

PCB bedrading ontwerp

Alle seinlyne moet geklassifiseer word voor PCB -bedrading. First of all, clock line, sensitive signal line, and then high-speed signal line, in order to ensure that this kind of signal through the hole is enough, distribution parameters of good characteristics, and then general unimportant signal line.

Incompatible signal lines should be far away from each other and do not parallel wiring, such as digital and analog, high speed and low speed, high current and small current, high voltage and low voltage. Seinkabels op verskillende lae moet vertikaal na mekaar gelei word om oorspraak te verminder. Die rangskikking van seinlyne word die beste gerangskik volgens die vloeirigting van die sein. Die uitsetseinlyn van ‘n stroombaan moet nie teruggetrek word na die insetseinlynarea nie. High-speed signal lines should be kept as short as possible to avoid interfering with other signal lines. Op die dubbele paneel kan, indien nodig, die isolasie-gronddraad aan beide kante van die hoëspoedseinlyn bygevoeg word. Alle hoëspoedkloklyne op die multilaagbord moet afgeskerm word volgens die lengte van kloklyne.

Die algemene beginsels vir bedrading is:

1. So ver moontlik om ‘n lae digtheid bedrading ontwerp te kies, en sein bedrading so ver as moontlik dikte konsekwent, wat bevorderlik is vir impedansie ooreenstemming. Vir rf-kring kan die onredelike ontwerp van seinlynrigting, breedte en lynspasiëring kruisinterferensie tussen seintransmissielyne veroorsaak.

2. So ver moontlik om aangrensende inset- en uitsetdrade en langafstand parallelle bedrading te vermy. Om die oorspraak van parallelle seinlyne te verminder, kan die afstand tussen seinlyne vergroot word, of isolasiegordels tussen seinlyne ingevoeg word.

3. Die lynwydte op PCB moet eenvormig wees en geen lynwydte mutasie sal plaasvind nie. PCB bedrading buig moet nie gebruik 90 grade hoek, moet gebruik boog of 135 grade Hoek, so ver as moontlik om die kontinuïteit van die lyn impedansie te handhaaf.

4. Minimize the area of the current loop. The external radiation intensity of current-carrying circuit is proportional to the current passing through, the loop area and the square of signal frequency. Reducing the current loop area can reduce the ELECTROMAGNETIC interference of PCB.

5. So ver as moontlik om die lengte van die draad te verminder, verhoog die breedte van die draad, is bevorderlik vir die vermindering van die impedansie van die draad.

6. Vir skakelaarbeheerseine moet die aantal SIGNAL PCB-bedrading wat die toestand terselfdertyd verander so ver as moontlik verminder word.