Miaraka amin’ny fitomboan’ny haingam-pandeha mifangaro haingam-pandeha sy Birao PCB density, Signal Integrity has become one of the issues that must be concerned in high-speed digital PCB design. The parameters of components and PCB board, the layout of components on PCB board, the wiring of high-speed Signal line and other factors, Can cause problems with signal integrity.

For PCB layouts, signal integrity requires a board layout that does not affect signal timing or voltage, while for circuit wiring, signal integrity requires termination elements, layout strategies, and wiring information. Ny haingam-pandeha haingam-pandeha amin’ny PCB, ny fametrahana diso ny singa farany, na ny tariby tsy misy tariby haingam-pandeha haingam-pandeha dia mety hiteraka olana amin’ny fahamendrehan’ny signal, izay mety hiteraka fivoahan’ny angon-drakitra ny angon-drakitra, ny fizaran-tany hiasa tsy mety na tsy mandeha mihitsy. Ny fomba handraisana ny tsy fivadihan’ny signal amin’ny fandinihana feno sy ny fandraisana fepetra mahomby amin’ny famolavolana PCB dia nanjary lohahevitra mafana teo amin’ny indostrian’ny famolavolana PCB.

Signal integrity Problem Good signal integrity means that the signal can respond with the correct timing and voltage level values when required. Mifanohitra amin’izay, rehefa tsy mamaly araka ny tokony ho izy ny famantarana dia misy ny olana amin’ny fahamendrehana famantarana. Ny olana amin’ny fahamendrehan’ny signal dia mety hitarika na hitarika mivantana amin’ny fanodikodinan’ny signal, ny tsy fetezan’ny fotoana, ny angon-drakitra tsy marina, ny adiresy sy ny tsipika fanaraha-maso, ary ny tsy fetezan’ny rafitra, na koa ny fianjeran’ny rafitra. Amin’ny dingan’ny fampiharana fanaingoana PCB, nanangona lalàna marobe momba ny famolavolana PCB ny olona. Ao amin’ny famolavolana PCB, ny fahamendrehan’ny famantarana ny PCB dia azo atao tsara kokoa amin’ny fijerena tsara ireo fitsipika momba ny famolavolana ireo.

Rehefa mamolavola PCB dia tokony ho fantatsika aloha ny fampahalalana momba ny famolavolana ny takelaka boribory iray manontolo, izay misy indrindra ao:

1. The number of devices, device size, device package, chip rate, whether PCB is divided into low speed, medium speed and high speed area, which is the interface input and output area;

2. The overall layout requirements, device layout location, whether there is a high power device, chip device heat dissipation special requirements;

3. Karazan-tsipika famantarana, hafainganam-pandeha sy fitarihana fitaterana, fitakiana fanaraha-maso impedance ny tsipika famantarana, fitarihana hafainganam-pandehan’ny bus sy toe-javatra mitondra fiara, famantarana lehibe ary fepetra fiarovana;

4. Karazana famatsiana herinaratra, karazana tany, fitakiana fandeferana amin’ny tabataba amin’ny famatsiana herinaratra sy ny tany, ny fametrahana sy ny fizarazarana ny famatsiana herinaratra sy ny fiaramanidina an-tany;

5. Karazana sy tahan’ny tsipika famataran’ora, loharano sy tari-dalan’ny tsipika famantaranandro, fitakiana fanemorana famantaranandro, takiana andalana lava indrindra.

PCB sosona famolavolana

Aorian’ny fahatakarana ny fampahalalana fototra momba ny biraon’ny fizaran-tany, dia ilaina ny mandanja ny fepetra takian’ny vidin’ny biraon’ny faritra sy ny fahamendrehan’ny famantarana, ary misafidy sosona wiring maromaro. At present, the circuit board has gradually developed from single layer, double layer and four layer to more multi-layer circuit board. Multi-layer PCB design can improve the reference surface of signal routing and provide backflow path for signal, which is the main measure to achieve good signal integrity. When designing PCB layering, follow the following rules:

1. Ny fiaramanidina fanondroana no tokony ho ny fiaramanidina ifotony. Ny famatsiana herinaratra sy ny fiaramanidina an-tanety dia azo ampiasaina ho fiaramanidina fanondro, ary samy manana asa fiarovana. Na izany aza, ny fiarovan-tenan’ny fiaramanidina famatsiana herinaratra dia ambany lavitra noho ny an’ny fiaramanidina an-tanety noho ny tsy fahampian’ny toetrany ambony sy ny fahasamihafana lehibe kokoa eo amin’ny fiaramanidina famatsiana herinaratra sy ny haavon’ny tany.

2. Digital circuit and analog circuit are layered. Raha mamela ny fandaniana amin’ny famolavolana, dia tsara kokoa ny mandamina ny faritra nomerika sy analog amin’ny sosona misaraka. If must want to arrange in same wiring layer, can use ditch, add earthing line, the method such as dividing line to remedy. Ny hery analoga sy nomerika ary ny tany dia tsy maintsy misaraka, tsy mifangaro mihitsy.

3. Tsy mamakivaky ny faritry ny fizarana ny fampandehanana famantarana lehibe amin’ny sosona mifanila. Ny famantarana dia hamorona tsipika famantarana lehibe manerana ny faritra ary hiteraka taratra mahery vaika. If the signal cable must cross the area when the ground cable is divided, a single point can be connected between the ground to form a connection bridge between the two ground points, and then the cable can be routed through the connection bridge.

4. Tokony hisy fiaramanidina ambanin’ny tany somary feno eo ambanin’ny velaran’ny singa. Ny fahamendrehan’ny fiaramanidina an-tany dia tsy maintsy tazomina araka izay tratra ho an’ny takelaka multilayer. Tsy misy tsipika famantarana avela mihazakazaka ao anaty fiaramanidina ambanin’ny tany.

5, avo matetika, hafainganam-pandeha avo, famantaranandro sy ny tsipika famantarana manan-danja hafa dia tokony hanana fiaramanidina tany mifanila. In this way, the distance between signal line and ground line is only the distance between PCB layers, so the actual current always flows in the ground line directly below the signal line, forming the smallest signal loop area and reducing radiation.

How to design the signal of integrity PCB

PCB layout design

Ny fanalahidin’ny famolavolana mari-pamantarana ny takelaka vita pirinty dia ny layout sy ny wiring, izay mifandray mivantana amin’ny fahombiazan’ny PCB. Prior to layout, the PCB size must be determined to meet the function at the lowest possible cost. Raha lehibe loatra ny PCB ary voazara, ny lava-pifindrana dia mety ho lava be, vokatr’izany dia mitombo ny impedance, mampihena ny fanoherana ny tabataba ary mitombo ny vidiny. Raha atambatra ireo singa, dia ratsy ny fiparitahan’ny hafanana, ary mety hitranga ny fifampikasohana amin’ny tariby mifanila. Noho izany, ny layout dia tsy maintsy mifototra amin’ireo singa miasa ao amin’ny faritra, rehefa mandinika ny mifanentana amin’ny elektromagnetika, ny famafana ny hafanana ary ny anton-drakitra.

Rehefa mametraka PCB misy signal digital na analog mifangaro dia aza afangaro ireo signal digital na analog. Raha tsy maintsy afangaro ny famantarana analogy sy nomerika, dia aza hadino ny milahatra mitsivalana mba hampihenana ny vokatry ny fifangaroana. Ny fizaran-tariby nomerika, ny fizarana analog, ary ny famoahana feo amin’ny tabilao circuit dia tokony hosarahana, ary ny circuit sensitive dia tokony halefa aloha, ary ny lalan’ny fampifangaroana eo amin’ny boriboritany dia tokony hesorina. Manokana indrindra, diniho ny famantaranandro, famerenana ary fanelingelenana ireo tsipika, dia aza ampifanarahina amin’ireo tsipika mihodina ankehitriny ireo tsipika ireo, raha tsy izany dia simba mora foana ireo fantsom-pifandraisana elektromagnetika, miteraka famerenana tsy ampoizina na fanelingelenana. The overall layout should follow the following principles:

1. Functional fizarazarana layout, Analog circuit sy nomerika faritra amin’ny PCB dia tokony hanana spatial layout samy hafa.

2. Araka ny fizotry ny fikajiana boribory handaminana ireo tarika mpivezivezy, mba hihazonana ny lalana mitovy amin’izany ny fikafika.

3. Take the core components of each functional circuit unit as the center, and other components are arranged around it.

4. Shorten the connection between high-frequency components as much as possible and try to reduce their distribution parameters.

5. Ireo singa mora tohina dia tsy tokony hifanakaiky, ny elanelam-bokatra sy ny fivoahana dia tokony ho lavitra.

How to design the signal of integrity PCB

PCB famolavolana tariby

Ny tsipika famantarana rehetra dia tokony sokajiana alohan’ny tariby PCB. First of all, clock line, sensitive signal line, and then high-speed signal line, in order to ensure that this kind of signal through the hole is enough, distribution parameters of good characteristics, and then general unimportant signal line.

Incompatible signal lines should be far away from each other and do not parallel wiring, such as digital and analog, high speed and low speed, high current and small current, high voltage and low voltage. Ireo tariby famantarana amin’ny sosona isan-karazany dia tokony haparitaka mitsivalana mba hampihenana ny crosstalk. Ny fandaminana ny tsipika famantarana dia voalamina tsara arakaraka ny fitarihan’ny famantarana. Tsy tokony haverina any amin’ny faritry ny tsipika famantarana ny fivoahana amin’ny faritra iray. High-speed signal lines should be kept as short as possible to avoid interfering with other signal lines. Amin’ny tontonana roa sosona, raha ilaina, ny tariby mitoka-monina dia azo ampiana amin’ny lafiny roa amin’ny tsipika famantarana haingam-pandeha. Ny tsipika famantaranandro hafainganam-pandeha rehetra amin’ny tabilao multilayer dia tokony ampingaina arakaraka ny halavan’ny tsipika famantaranandro.

Ny fitsipika ankapobeny amin’ny tariby dia:

1. Arak’izay azo atao ny misafidy ny famolavolana wiring ambany hakitroky, ary ny wiring famantarana araka izay azo atao hatevin’ny mifanaraka, mifanaraka amin’ny impedance. Ho an’ny fizaran-tany RF, ny endrika tsy mitombina amin’ny fitarihan’ny tsipika famantarana, ny sakany ary ny elanelan’ny tsipika dia mety hiteraka fitsabahana eo amin’ny tsipika fampitana signal.

2. Hatramin’izay azo atao mba hisorohana ny tariby fampidirana sy tariby famoahana ary tariby mifanindran-davitra. Mba hampihenana ny crosstalk an’ny tsipika famantarana mifanila dia azo ampitomboina ny elanelana misy eo amin’ny tsipika famantarana na ny fehikibo mitoka-monina eo anelanelan’ny tsipika famantarana.

3. Ny sakan’ny tsipika amin’ny PCB dia tokony hitovy ary tsy tokony hisy ny fiovan’ny sakany. Ny fametahana tariby PCB dia tsy tokony hampiasa zoro 90 degre, tokony hampiasa arc na 135 degre Angle, araka izay azo atao mba hitazomana ny fitohizan’ny tsimok’aretin’ny tsipika.

4. Minimize the area of the current loop. The external radiation intensity of current-carrying circuit is proportional to the current passing through, the loop area and the square of signal frequency. Reducing the current loop area can reduce the ELECTROMAGNETIC interference of PCB.

5. Araka izay azo atao mba hampihenana ny halavan’ny tariby, hampitombo ny sakan’ny ny tariby, dia conducive amin’ny fampihenana ny impedance ny tariby.

6. Ho an’ny famantarana fanaraha-maso switch, ny isan’ny tariby PCB SIGNAL izay manova ny fanjakana amin’ny fotoana iray dia tokony hahena araka izay tratra.