Na te pikinga o te tere whakawhiti ara iahiko whakauru me te Poari PCB density, Signal Integrity has become one of the issues that must be concerned in high-speed digital PCB design. The parameters of components and PCB board, the layout of components on PCB board, the wiring of high-speed Signal line and other factors, Can cause problems with signal integrity.

For PCB layouts, signal integrity requires a board layout that does not affect signal timing or voltage, while for circuit wiring, signal integrity requires termination elements, layout strategies, and wiring information. Ko te tere o te tohu i runga i te PCB, te he o te whakaurunga o nga waahanga mutunga, te he ranei o te waea waea o nga tohu tere-tere ka puta he raru o te tapatahi o te tohu, ka puta pea te punaha ki te whakaputa i nga raraunga he, ka hee te mahi a te ara iahiko, kaore ranei e mahi. Me pehea te aro pono ki te pono me te whai i nga tikanga whakahaere i te hoahoa PCB kua waiho hei kaupapa wera i roto i te umanga hoahoa PCB.

Signal integrity Problem Good signal integrity means that the signal can respond with the correct timing and voltage level values when required. Engari, ki te kore e whakautu tika te tohu, ka puta he raru o te tapatahi tohu. Ka taea e nga raru o te tapatahi o te tohu te arahi ki te korikori tohu, te hapa i te wa, te he o nga raraunga, te wahitau me nga raina whakahaere, me te he o te punaha, me te tukinga o te punaha. I roto i te tukanga o te mahi hoahoa PCB, kua whakaemi te iwi i te rota o ture hoahoa PCB. I roto i te hoahoa PCB, te tohu tapatahi o te PCB ka taea te pai ake ma te ata titiro ki enei ture hoahoa.

I te wa e hoahoa ana i te PCB, me maarama tuatahi tatou ki nga korero hoahoa o te poari ara iahiko katoa, ko te nuinga kei roto:

1. The number of devices, device size, device package, chip rate, whether PCB is divided into low speed, medium speed and high speed area, which is the interface input and output area;

2. The overall layout requirements, device layout location, whether there is a high power device, chip device heat dissipation special requirements;

3. Momo raina tohu, tere me te ahunga tuku, tikanga whakahaere aukati o te raina tohu, ahunga tere pahi me te taraiwa, tohu matua me nga tikanga tiaki;

4. Momo o te hiko, te momo whenua, nga whakaritenga haruru mo te tuku hiko me te whenua, te whakatakoto me te wehewehenga o te hiko hiko me te rererangi whenua;

5. Nga momo me nga reiti o nga rarangi karaka, te puna me te ahunga o nga rarangi karaka, nga whakaritenga whakaroa karaka, nga whakaritenga raina roa.

Hoahoa paparua PCB

I muri i te maarama ki nga korero tuuturu o te poari ara iahiko, me pauna nga whakaritenga hoahoa mo te utu poari araahiko me te pono o te tohu, ka kowhiri i te maha o nga papa waea. At present, the circuit board has gradually developed from single layer, double layer and four layer to more multi-layer circuit board. Multi-layer PCB design can improve the reference surface of signal routing and provide backflow path for signal, which is the main measure to achieve good signal integrity. When designing PCB layering, follow the following rules:

1. Ko te rererangi tohutoro ko te papa rererangi pai ake. Ka taea te whakamahi i te mana hiko me te rererangi whenua hei rererangi tohutoro, a he mahi parepare to raua. Heoi, he iti ake te awe o te waka rererangi hiko i tera o te waka rererangi na te mea he teitei ake te ahua o te impedance me te nui ake o te rereketanga i waenga i te waka rererangi hiko me te taumata whenua tohutoro.

2. Digital circuit and analog circuit are layered. Mena ka whakaaetia nga utu hoahoa, he pai ake te whakarite iahiko matihiko me te tairitenga ki runga paparanga motuhake. If must want to arrange in same wiring layer, can use ditch, add earthing line, the method such as dividing line to remedy. Me wehe te mana tairite me te matihiko me te whenua, kaua rawa e hanumi.

3. Ko te huringa tohu matua o nga papa e piri ana kaore e whiti i te waahanga wehewehe. Ko nga tohu ka hanga he kohanga tohu nui puta noa i te rohe ka whakaputa i te iraruke kaha. If the signal cable must cross the area when the ground cable is divided, a single point can be connected between the ground to form a connection bridge between the two ground points, and then the cable can be routed through the connection bridge.

4. Kia noho te whenua rererangi ki raro i te mata o te waahanga. Ko te tapatahi o te rererangi whenua me mau tonu mo te pereti multilayer. Kaore he raina tohu e whakaaehia kia rere i te papa rererangi o te whenua.

5, te auau teitei, te tere tere, te karaka me etahi atu rarangi tohu matua me whai rererangi whenua tata. In this way, the distance between signal line and ground line is only the distance between PCB layers, so the actual current always flows in the ground line directly below the signal line, forming the smallest signal loop area and reducing radiation.

How to design the signal of integrity PCB

PCB layout design

Ko te matua o te hoahoa tapatahi tohu o te papa taia ko te whakatakotoranga me te waea, e hono tika ana ki te mahi a te PCB. Prior to layout, the PCB size must be determined to meet the function at the lowest possible cost. Mena he nui rawa te PCB ka tohatohahia, ka roa pea te raina tuku, ka nui ake te aukati, ka heke te haruru, ka piki ake te utu. Mena ka whakakotahihia nga waahanga, he ngoikore te wera o te wera, katahi ka puta he korero whakawhiti ki nga waea tata. Na reira, ko te whakatakotoranga me matua hangai ki nga waahanga mahi o te ara iahiko, i te wa e whakaaro ana koe ki te hototahitanga o te hiko, te wera o te wera me nga waahanga o te hononga.

I te whakatakoto i te PCB me nga tohu mamati me nga tohu tairitenga, kaua e uru ki nga tohu mamati me nga tohu tairitenga. Mena me whakauru nga tohu tairitenga me nga tohu matihiko, kia kaha ki te raina poutū kia iti ake ai te hua o te honohono. Ko te ara iahiko matihiko, ara iahiko tairitenga, me te ara iahiko haruru i runga i te papa taiawhio me wehe, me te ara iahiko tairongo i te tuatahi, me whakakore te ara hono i waenga i nga iahiko. Ina koa, whakaarohia te karaka, te tautuhi me te aukati i nga raina, kaua e whakariterite i enei raina ki nga raina whakawhiti nui o te waa, ki te kore e tino pakaru i nga tohu honohono hiko, kia kore ai e hoki ohorere, kia pore noa ranei. The overall layout should follow the following principles:

1. Te whakatakotoranga whakawehenga mahi, te ara iahiko tairitenga me te ara iahiko matihiko i runga i te PCB me rereke te whakatakotoranga mokowā.

2. E ai ki te tukanga tohu ara iahiko ki te whakarite i nga waahanga hiko mahi, kia rere te tohu ki te pupuri i te huarahi kotahi.

3. Take the core components of each functional circuit unit as the center, and other components are arranged around it.

4. Shorten the connection between high-frequency components as much as possible and try to reduce their distribution parameters.

5. Ko nga waahanga ohorere kia kaua e tata rawa ki a ratau ano, kia matara atu nga waahanga whakauru me nga putanga.

How to design the signal of integrity PCB

Hoahoa waea PCB

Me whakarōpūhia nga raina tohu katoa i mua i te waea PCB. First of all, clock line, sensitive signal line, and then high-speed signal line, in order to ensure that this kind of signal through the hole is enough, distribution parameters of good characteristics, and then general unimportant signal line.

Incompatible signal lines should be far away from each other and do not parallel wiring, such as digital and analog, high speed and low speed, high current and small current, high voltage and low voltage. Ko nga taura tohu kei runga i nga paparanga rereke me tuku poutū ki a ratau hei whakaiti i te korero whakawhiti. Ko te whakariterite i nga raina tohu he pai te whakarite kia rite ki te ahunga rere o te tohu. Ko te raina tohu whakaputa o te ara iahiko kaua e hoki ki muri ki te rohe raina tohu whakauru. High-speed signal lines should be kept as short as possible to avoid interfering with other signal lines. I runga i te papa rua, mehemea e tika ana, ka taea te taapiri i te waea whenua wehe ki nga taha e rua o te raina tohu tere. Ko nga raina karaka tere-katoa i runga i te papa multilayer me whakangungu kia rite ki te roa o nga raina karaka.

Ko nga maapono whanui mo te waea waea ko:

1. Ka taea ki te whiriwhiri i te hoahoa waea kiato iti, me te waea tohu kia rite ki te matotoru kia rite, e pai ana ki te whakataurite impedance. Mo te ara iahiko rf, ko te hoahoa koretake o te ahunga raina tohu, te whanui me te mokowhiti raina ka raru pea i waenga i nga raina tuku tohu.

2. Ka taea ki te karo i nga waea whakauru me nga waea whakaputa me nga waea whakarara tawhiti. Hei whakaiti i te kowhiti o nga raina tohu whakarara, ka taea te whakanui ake i te mokowhiti i waenga i nga raina tohu, ka taea ranei te whakauru i nga whitiki wehe i waenga i nga raina tohu.

3. Ko te whanui o te raina i runga i te PCB kia rite, kaore hoki he rereke o te whanui o te raina ka puta. Kaua te piko waea PCB e whakamahi i te 90 nekehanga kokonga, me whakamahi i te pewa 135 nga nekehanga ranei o te Koki, tae noa ki te waa ki te pupuri i te haere tonu o te aukati raina.

4. Minimize the area of the current loop. The external radiation intensity of current-carrying circuit is proportional to the current passing through, the loop area and the square of signal frequency. Reducing the current loop area can reduce the ELECTROMAGNETIC interference of PCB.

5. Ki te taea ki te whakaiti i te roa o te waea, whakanui i te whanui o te waea, he pai ki te whakaiti i te aukati o te waea.

6. Mo nga tohu whakahaere pana, ko te maha o nga waea waea PCB KAUPAPA e huri ana i te ahua i te wa kotahi me whakaiti kia taea.