da yake jawabi na Kwamitin PCB, many friends will think that it can be seen everywhere around us, from all household appliances, all kinds of accessories in the computer, to all kinds of digital products, as long as electronic products almost all use PCB board, so what is PCB board? A PCB is a PrintedCircuitBlock, which is a printed circuit board for electronic components to be inserted. A copperplated base plate is printed and etched out of the etching circuit.

Kwamitin PCB za a iya raba shi zuwa jirgi mai hawa ɗaya, jirgi mai hawa biyu da allon allo mai yawa. An haɗa abubuwan lantarki a cikin PCB. A kan PCB-Layer guda ɗaya, abubuwan da aka gyara suna mai da hankali a gefe ɗaya kuma wayoyin suna mai da hankali kan ɗayan. Don haka muna buƙatar yin ramuka a cikin jirgin don fil ɗin su iya bi ta cikin jirgi zuwa wancan gefe, don haka ana ɗora sassan sassan zuwa wancan gefe. Because of this, the positive and negative sides of such PCB are respectively called ComponentSide and SolderSide.

A double-layer board can be seen as two single-layer boards glued together, with electronic components and wiring on both sides of the board. Wani lokaci ya zama dole a haɗa waya ɗaya daga wannan gefe zuwa wancan gefen jirgin ta hanyar ramin jagora (ta hanyar). Ramin jagororin ƙananan ramuka ne a cikin PCB da aka cika ko aka lulluɓe da ƙarfe waɗanda za a iya haɗa su da wayoyi a ɓangarorin biyu. Yanzu da yawa motherboards kwamfuta suna amfani da 4 ko ma 6 yadudduka na allon PCB, yayin da katunan zane gabaɗaya suna amfani da yadudduka 6 na allon PCB. Yawancin katunan zane-zane masu girman gaske kamar jerin nVIDIAGeForce4Ti suna amfani da yadudduka 8 na allon PCB, wanda ake kira allon PCB da yawa. The problem of connecting lines between layers is also encountered on multi-layer PCBS, which can also be achieved through guide holes.

Saboda PCB ne mai ɗimbin yawa, wani lokacin ramukan jagora basa buƙatar shiga cikin PCB gaba ɗaya. Irin waɗannan ramukan jagora ana kiransu Buriedvias da Blindvias saboda kawai suna ratsa ‘yan yadudduka. Makafi ramukan suna haɗa yadudduka da yawa na PCBS na ciki zuwa saman PCBS ba tare da sun shiga cikin dukkan allon ba. An haɗa ramukan da aka binne zuwa PCB na ciki, don haka ba a ganin haske daga farfajiya. A cikin PCB mai yawa, gabaɗaya ana haɗa kai tsaye zuwa waya ta ƙasa da wutar lantarki. Don haka muna rarrabe yadudduka azaman sigina, iko ko ƙasa. Idan ɓangarorin akan PCB suna buƙatar wadatattun wutar lantarki daban -daban, galibi suna da madaidaicin wuta biyu da layin waya. The more layers you use, the higher the cost. Of course, the use of more layers of PCB board to provide signal stability is very helpful.

The process of making a professional PCB board is quite complicated. Take a 4-layer PCB board for example. PCB na babban jirgi galibi yadudduka 4 ne. Lokacin masana’anta, ana mirgine yadudduka biyu na tsakiya, yanke, etched, oxidized da electroplated bi da bi. Layukan huɗu sune farfajiya, ɓangaren wutar lantarki, stratum da lamination ɗin bi da bi. Sannan ana danna layuka huɗu don ƙirƙirar PCB don babban allon. Then the holes were punched and made. Bayan tsaftacewa, an buga yadudduka biyu na layi, jan ƙarfe, etching, gwaji, walda juriya, bugun allo. A ƙarshe, gabaɗayan PCB (gami da motherboards da yawa) an hatimce su a cikin PCB na kowane motherboard, sannan ana aiwatar da fakitin injin bayan cin gwajin. If the copper skin is not well coated in THE process of PCB production, there will be poor adhesion phenomenon, easy to imply short circuit or capacitance effect (easy to cause interference). The holes on PCB must also be taken care of. If the hole is punched not in the middle, but on one side, it will result in uneven matching or easy contact with the power supply layer or formation in the middle, resulting in potential short-circuiting or bad grounding factors.

Copper wiring process

The first step in fabrication is to establish an online wiring between parts. We use negative transfer to express the working negative on a metal conductor. Dabarar ita ce a shimfiɗa siririn murfin jan ƙarfe a saman farfajiyar gaba ɗaya kuma a cire duk wani abin da ya wuce haddi. Aika canja wuri wata hanya ce da ba a yi amfani da ita ba, wacce ita ce amfani da waya ta jan ƙarfe kawai inda ake buƙata, amma ba za mu yi magana game da shi a nan ba.

Positive photoresists are made from photosensitizers that dissolve under illumination. There are many ways to treat photoresist on copper, but the most common way is to heat it and roll it over a surface containing photoresist. It can also be sprayed in liquid form, but the dry film provides higher resolution and allows for thinner wires. Hood ɗin kawai samfuri ne don yin yadudduka na PCB. Hood ɗin da ke rufe mai ɗaukar hoto a kan PCB yana hana wasu fannoni na masu ɗaukar hoto daga fallasa har sai fitilar ta bayyana ga hasken UV. These areas, which are covered with photoresist, will become wiring. Sauran sassan jan ƙarfe da ba za a zana su ba bayan ci gaban photoresist. The etching process may involve dipping the board into the etching solvent or spraying the solvent onto the board. Gabaɗaya ana amfani dashi azaman etching sauran ƙarfi ta amfani da ferric chloride da dai sauransu. After etching, remove the remaining photoresist.

1. Waya nisa da na yanzu

General width should not be less than 0.2mm (8mil)

On high density and high precision PCBS, pitch and line width are generally 0.3mm (12mil).

Lokacin kaurin murfin jan karfe kusan 50um, faɗin waya shine 1 ~ 1.5mm (60mil) = 2A

Kasancewar gama gari gaba ɗaya shine 80mil, musamman don aikace -aikace tare da microprocessors.

2. Yaya girman yawan jirgi mai sauri?

Lokacin tashi/faɗuwar lokacin siginar “sau 3 ~ 6 lokacin watsa siginar, ana ɗaukarsa azaman siginar sauri.

Don da’irori na dijital, mabuɗin shine don kallon tsinkayen siginar, lokacin da zai ɗauka ya faɗi,

According to a very classic book “High Speed Digtal Design” theory, the signal from 10% to 90% of the time is less than 6 times the wire delay, is high-speed signal! —- – – – – – wato! Even 8KHz square wave signals, as long as the edges are steep enough, are still high-speed signals, and transmission line theory needs to be used in wiring

3.PCB stacking da layering

The four – layer plate has the following stacking sequence. An bayyana fa’idodi da rashin lamination daban -daban a ƙasa:

Hukuncin farko yakamata ya zama mafi kyau daga yadudduka huɗu. Because the outer layer is the stratum, it has a shielding effect on EMI. Meanwhile, the power supply layer is reliable and close to the stratum, which makes the internal resistance of the power supply smaller and achieves the best suburbs. Koyaya, ba za a iya amfani da shari’ar farko ba lokacin da ƙimar hukumar ta yi yawa. Domin a lokacin, ba a tabbatar da mutuncin layin farko, kuma siginar Layer ta biyu ta fi muni. In addition, this structure can not be used in the case of large power consumption of the whole board.

The second case is the one we usually use the most. Daga tsarin jirgi, bai dace da ƙirar kewaya na dijital mai sauri ba. Yana da wahala a kula da ƙarancin ƙarancin ƙarfi a cikin wannan tsarin. Take a plate 2 mm as an example: Z0=50ohm. To line width of 8mil. Copper foil thickness is 35цm. Don haka layin siginar da tsakiyar samuwar shine 0.14mm. The formation and power layer are 1.58mm. This greatly increases the internal resistance of the power supply. In this kind of structure, because the radiation is to the space, shielding plate is needed to reduce EMI.

In the third case, the signal line on layer S1 has the best quality. S2. Farashin EMI. But the power supply impedance is large. This board can be used when the power consumption of the whole board is high and the board is an interference source or adjacent to the interference source.

4. Impedance matching

An ƙaddara girman siginar wutar lantarki da aka nuna ta hanyar ƙididdigar mahimmancin tushen ρ S da ma’aunin ɗaukar nauyi ρL

ρL = (RL-z0)/(RL + Z0) and ρS = (rS-z0)/(RS + Z0)

A cikin lissafin da ke sama, idan RL = Z0, ma’aunin ɗaukar nauyi ρL = 0. Idan RS = Z0 coefficient na ƙarshen ƙarshen tushen ρS = 0.

Saboda rashin daidaiton layin watsawa na yau da kullun Z0 yakamata ya cika buƙatun 50 ω 50 ω, kuma matsalar rashin ɗaukar nauyi yawanci a cikin dubban ohms zuwa dubunnan ohms. Sabili da haka, yana da wahala a gane daidaiton impedance a gefen kaya. However, because the signal source (output) impedance is usually relatively small, roughly in the tens of ohms. Don haka yana da sauƙin aiwatar da daidaiton impedance a tushen. If a resistor is connected at the load end, the resistor will absorb part of the signal to the detriment of transmission (my understanding). Lokacin da aka zaɓi madaidaicin TTL/CMOS 24mA na yanzu, ƙarancin fitowar sa kusan 13 ω. If the transmission line impedance Z0=50 ω, then a 33 ω source-end matching resistor should be added. 13 ω +33 ω = 46 ω (kusan 50 ω, rauni mai rauni yana taimakawa lokacin saita sigina)

Lokacin da aka zaɓi wasu ƙa’idodin watsawa da raƙuman motsi, rashin daidaiton da ya dace na iya zama daban. A cikin dabaru mai sauri da ƙirar kewaya, don wasu siginar maɓalli, kamar agogo, siginar sarrafawa, muna ba da shawarar cewa dole ne a ƙara tushen juriya mai dacewa.

Ta wannan hanyar, siginar da aka haɗa za ta dawo da baya daga gefen kaya, saboda matsalar rashin daidaiton tushe ta yi daidai, siginar da aka nuna ba za ta sake komawa baya ba.