tautala o Laupapa PCB, many friends will think that it can be seen everywhere around us, from all household appliances, all kinds of accessories in the computer, to all kinds of digital products, as long as electronic products almost all use PCB board, so what is PCB board? A PCB is a PrintedCircuitBlock, which is a printed circuit board for electronic components to be inserted. A copperplated base plate is printed and etched out of the etching circuit.

Laupapa PCB mafai ona vaevaeina i le tasi vaega laupapa, faʻalua vaega laupapa ma eseese vaega laupapa. O vaega faʻaeletoroni ua tuʻufaʻatasia i totonu o le PCB. I luga o le autu tasi-vaega PCB, o vaega e faʻalauteleina i le tasi itu ma uaea e taulaʻi i le isi. Ma e tatau ona tatou faia pu i le laupapa ina ia mafai e pine e ui atu i le laupapa i le isi itu, o lea o pine o vaega na ueloina i le isi itu. Because of this, the positive and negative sides of such PCB are respectively called ComponentSide and SolderSide.

A double-layer board can be seen as two single-layer boards glued together, with electronic components and wiring on both sides of the board. O nisi taimi e tatau ai ona faʻafesoʻotaʻi se tasi uaea mai le tasi itu i le isi itu o le laupapa e ala i se pu faʻatonuga (ala). O pu faʻasino o ni pu laiti i le PCB ua faʻatumu pe ufiufi i uʻamea e mafai ona faʻafesoʻotaʻi i uaea i itu uma e lua. O le tele o komepiuta laupapa o loʻo faʻaaogaina le 4 pe oʻo foi i le 6 faaputuga o laupapa PCB, ae o ata e masani ona faʻaaogaina ai laupapa e 6 o le laupapa PCB. O le tele o ata maualuluga pei o nVIDIAGeForce4Ti faʻasologa faʻaaoga 8 faaputuga o laupapa PCB, lea e taʻua o le tele-layer PCB laupapa. The problem of connecting lines between layers is also encountered on multi-layer PCBS, which can also be achieved through guide holes.

Talu ai o le tele-layer PCB, o isi taimi e le manaʻomia ai ni pu faʻasino e ati totonu atoa o le PCB. O ia pu faʻataʻitaʻi e taʻua o Buriedvias ma Blindvias aua e naʻo totonu lava o isi vaega e maua ai. Pepa tauaso faʻafesoʻotaʻi le tele o faaputuga o totonu PCBS i luga PCBS e aunoa ma le ofi i le atoa laupapa. O faʻaputuga pu e faʻafesoʻotaʻi lava i le PCB i totonu, o lea e le vaaia le malamalama mai luga. I le multilayer PCB, o le vaega atoa e fesoʻotaʻi saʻo i le eleele uaea ma le paoa sapalai. O lea matou te faʻavasegaina vaega o Faʻailo, Mana poʻo Eleele. Afai o vaega i luga o le PCB manaʻomia sapalai mana eseese, e masani lava ona sili atu ma le lua malosiaga ma uaea faʻaputuga. The more layers you use, the higher the cost. Of course, the use of more layers of PCB board to provide signal stability is very helpful.

The process of making a professional PCB board is quite complicated. Take a 4-layer PCB board for example. O le PCB o le laupapa autu e tele lava 4 faaputuga. A gaosia, o le ogatotonu lua faaputuga ua faataavale, tipi, vaneina, oxidized ma electroplated faasologa. O le fa faaputuga o vaega vaega, paoa vaega, stratum ma solder lamination faasologa. O le fa vaega ua oomi faʻatasi e fausia ai se PCB mo le autu laupapa. Then the holes were punched and made. Ina ua maeʻa le faʻamamaina, o fafo atu vaega e lua o le laina ua lolomiina, ‘apamemea, faʻapipiʻiina, faʻataʻitaʻiga, uʻamea teteʻe vaega, lau lolomiina. I le iuga, o le atoa PCB (e aofia ai le tele o motherboard) ua faʻailogaina i PCB o motherboard taʻitasi, ona faʻamamaina ai lea o le lagona gaogao peʻa maeʻa pasia le suʻega. If the copper skin is not well coated in THE process of PCB production, there will be poor adhesion phenomenon, easy to imply short circuit or capacitance effect (easy to cause interference). The holes on PCB must also be taken care of. If the hole is punched not in the middle, but on one side, it will result in uneven matching or easy contact with the power supply layer or formation in the middle, resulting in potential short-circuiting or bad grounding factors.

Copper wiring process

The first step in fabrication is to establish an online wiring between parts. We use negative transfer to express the working negative on a metal conductor. O le togafiti o le salalau o se manifinifi vaega o apamemea foil luga o le atoa luga ma aveese soʻo se soona. O le faʻaopopoga faʻaopopoga o se isi auala e le faʻaaogaina, o le faʻaaogaina lea o uaea apamemea naʻo le mea e manaʻomia ai, ae ma te le talanoa e uiga i ai.

Positive photoresists are made from photosensitizers that dissolve under illumination. There are many ways to treat photoresist on copper, but the most common way is to heat it and roll it over a surface containing photoresist. It can also be sprayed in liquid form, but the dry film provides higher resolution and allows for thinner wires. O le hood ua na o se faʻataʻitaʻiga mo le faia PCB faaputuga. O se pulou e ufiufi ai le ata i luga o le PCB o loʻo taofia ai nisi o vaega o le tagata puʻe ata mai le faʻaalia seʻia oʻo ina malamalama le tagata ata i le malamalama UV. These areas, which are covered with photoresist, will become wiring. Other bare copper parts to be etched after photoresist development. The etching process may involve dipping the board into the etching solvent or spraying the solvent onto the board. Masani faʻaaogaina o le faʻapipiina o le solvent e faʻaogaina ai le ferric chloride ma isi. After etching, remove the remaining photoresist.

1. Lautele lautele ma le taimi nei

General width should not be less than 0.2mm (8mil)

On high density and high precision PCBS, pitch and line width are generally 0.3mm (12mil).

A o le mafiafia o apamemea foil e tusa ma le 50um, o le lautele uaea o 1 ~ 1.5mm (60mil) = 2A

O le masani masani e masani lava 80mil, aemaise lava mo apalai ma microprocessors.

2. O le a le maualuga o le taimi o le maualuga-televave laupapa?

A oʻo i le tulaʻi / pa’ū o le taimi faʻailo “3 ~ 6 taimi o faʻailo taimi faʻailo, ua manatu o se maualuga saosaoa faʻailo.

Mo faataamilosaga matagaluega, o le ki o le tilotilo i le pito tifato tifato o le faailo, le taimi e alu ai i luga ma paʻu,

According to a very classic book “High Speed Digtal Design” theory, the signal from 10% to 90% of the time is less than 6 times the wire delay, is high-speed signal! – – – – – – aofia ai! Even 8KHz square wave signals, as long as the edges are steep enough, are still high-speed signals, and transmission line theory needs to be used in wiring

3.PCB faʻapipiʻiina ma faʻaputuga

The four – layer plate has the following stacking sequence. O le lelei ma le lelei o le ‘eseʻese lamination o loʻo faʻamatalaina i lalo:

O le muamua mataupu e tatau ona sili atu i le fa vaega. Because the outer layer is the stratum, it has a shielding effect on EMI. Meanwhile, the power supply layer is reliable and close to the stratum, which makes the internal resistance of the power supply smaller and achieves the best suburbs. Peitai, o le muamua mataupu e le mafai ona faʻaaogaina pe a fai o le laupapa density e fai si maualuga. Because then, the integrity of the first layer is not guaranteed, and the second layer signal is worse. In addition, this structure can not be used in the case of large power consumption of the whole board.

The second case is the one we usually use the most. Mai le fausaga o le laupapa, e le talafeagai mo maualuga-saosaoa faʻatekonolosi matagaluega mamanu. E faigata ona taofiofia le paʻu maualalo o le malosi i lenei fausaga. Take a plate 2 mm as an example: Z0=50ohm. To line width of 8mil. Copper foil thickness is 35цm. Ma le faʻailoga faailo ma le ogatotonu o le faʻavaeina o 0.14mm. The formation and power layer are 1.58mm. This greatly increases the internal resistance of the power supply. In this kind of structure, because the radiation is to the space, shielding plate is needed to reduce EMI.

In the third case, the signal line on layer S1 has the best quality. S2. EMI talita. But the power supply impedance is large. This board can be used when the power consumption of the whole board is high and the board is an interference source or adjacent to the interference source.

4. Impedance matching

O le lapoʻa o le faailo o le eletise faailo e fuafuaina e le mafuaʻaga faʻaali coefficient ρ S ma le avega faʻaata ata coefficient ρL

ρL = (RL-z0)/(RL + Z0) and ρS = (rS-z0)/(RS + Z0)

I le faʻatatauina i luga atu, pe a fai o RL = Z0, o le avega faʻaata o le coefficient ρL = 0. Afai o le RS = Z0 mafuaʻaga o le iuga o le manatu tuʻufaʻatasi ρS = 0.

Talu ai o le masani laina laina faʻafitauli Z0 tatau ona masani ona faʻamalieina manaʻoga o le 50 ω 50 ω, ma le avega faʻafitauli masani i le faitau afe o ohm i le sefulu o afe o ohm. O le mea lea, e faigata ona iloa faʻafetaui tutusa i le itu avega. However, because the signal source (output) impedance is usually relatively small, roughly in the tens of ohms. E sili atu ona faigofie le faʻatinoina o faʻafetaui tutusa i le puna. If a resistor is connected at the load end, the resistor will absorb part of the signal to the detriment of transmission (my understanding). A filifilia le TTL / CMOS masani 24mA taʻavale taimi nei, o lona faʻatinoga faʻafitauli e tusa ma le 13 ω. If the transmission line impedance Z0=50 ω, then a 33 ω source-end matching resistor should be added. 13 ω +33 ω =46 ω (approximately 50 ω, weak underdamping helps signal setup time)

When other transmission standards and drive currents are selected, the matching impedance can be different. I le saoasaoa-saoasaoa logika ma matagaluega mamanu, mo nisi ki faailo, pei o uati, faʻatonutonu faailo, matou fautua atu o le punavai tutusa resistor tatau ona faʻaopopo.

I lenei auala, o le fesoʻotaʻiga faʻailo o le a atagia mai i tua mai le avega itu, ona o le mafuaʻaga faʻafetaui afea, o le faʻaalia faailo le a le toe atagia mai i tua.