Wrth siarad am Bwrdd PCB, many friends will think that it can be seen everywhere around us, from all household appliances, all kinds of accessories in the computer, to all kinds of digital products, as long as electronic products almost all use PCB board, so what is PCB board? A PCB is a PrintedCircuitBlock, which is a printed circuit board for electronic components to be inserted. A copperplated base plate is printed and etched out of the etching circuit.

Gellir rhannu bwrdd PCB yn fwrdd haen sengl, bwrdd haen ddwbl a bwrdd aml-haen. Mae cydrannau electronig wedi’u hintegreiddio i’r PCB. Ar PCB un haen sylfaenol, mae’r cydrannau wedi’u crynhoi ar un ochr ac mae’r gwifrau wedi’u canolbwyntio ar yr ochr arall. Felly mae angen i ni wneud tyllau yn y bwrdd fel y gall y pinnau fynd trwy’r bwrdd i’r ochr arall, fel bod pinnau’r rhannau wedi’u weldio i’r ochr arall. Because of this, the positive and negative sides of such PCB are respectively called ComponentSide and SolderSide.

A double-layer board can be seen as two single-layer boards glued together, with electronic components and wiring on both sides of the board. Weithiau mae angen cysylltu gwifren sengl o un ochr i ochr arall y bwrdd trwy dwll tywys (trwy). Mae tyllau tywys yn dyllau bach yn y PCB wedi’u llenwi neu wedi’u gorchuddio â metel y gellir eu cysylltu â gwifrau ar y ddwy ochr. Nawr mae llawer o famfyrddau cyfrifiadurol yn defnyddio 4 neu hyd yn oed 6 haen o fwrdd PCB, tra bod cardiau graffeg yn gyffredinol yn defnyddio 6 haen o fwrdd PCB. Mae llawer o gardiau graffeg pen uchel fel cyfres nVIDIAGeForce4Ti yn defnyddio 8 haen o fwrdd PCB, a elwir yn fwrdd PCB aml-haen. The problem of connecting lines between layers is also encountered on multi-layer PCBS, which can also be achieved through guide holes.

Oherwydd ei fod yn PCB aml-haen, weithiau nid oes angen i’r tyllau canllaw dreiddio i’r PCB cyfan. Gelwir tyllau canllaw o’r fath yn Buriedvias a Blindvias oherwydd eu bod yn treiddio ychydig o haenau yn unig. Mae tyllau dall yn cysylltu sawl haen o PCBS mewnol ag arwyneb PCBS heb dreiddio i’r bwrdd cyfan. Dim ond â’r PCB mewnol y mae tyllau claddedig wedi’u cysylltu, felly nid oes golau i’w weld o’r wyneb. Mewn PCB amlhaenog, mae’r haen gyfan wedi’i chysylltu’n uniongyrchol â’r wifren ddaear a’r cyflenwad pŵer. Felly rydyn ni’n dosbarthu’r haenau fel Signal, Power or Ground. Os oes angen cyflenwadau pŵer gwahanol ar y rhannau ar y PCB, fel rheol mae ganddyn nhw fwy na dwy haen pŵer a gwifren. The more layers you use, the higher the cost. Of course, the use of more layers of PCB board to provide signal stability is very helpful.

The process of making a professional PCB board is quite complicated. Take a 4-layer PCB board for example. Mae PCB y prif fwrdd yn 4 haen yn bennaf. Wrth weithgynhyrchu, mae’r ddwy haen ganol yn cael eu rholio, eu torri, eu hysgythru, eu ocsidio a’u electroplatio yn y drefn honno. Y pedair haen yw arwyneb cydran, haen pŵer, stratwm a lamineiddiad sodr yn y drefn honno. The four layers are then pressed together to form a PCB for the main board. Then the holes were punched and made. After cleaning, the outer two layers of the line is printed, copper, etching, testing, welding resistance layer, screen printing. Yn olaf, mae’r PCB cyfan (gan gynnwys llawer o famfyrddau) wedi’i stampio i mewn i PCB pob mamfwrdd, ac yna mae pecynnu gwactod yn cael ei wneud ar ôl pasio’r prawf. If the copper skin is not well coated in THE process of PCB production, there will be poor adhesion phenomenon, easy to imply short circuit or capacitance effect (easy to cause interference). The holes on PCB must also be taken care of. If the hole is punched not in the middle, but on one side, it will result in uneven matching or easy contact with the power supply layer or formation in the middle, resulting in potential short-circuiting or bad grounding factors.

Copper wiring process

The first step in fabrication is to establish an online wiring between parts. We use negative transfer to express the working negative on a metal conductor. The trick is to spread a thin layer of copper foil over the entire surface and remove any excess. Mae atodi trosglwyddo yn ddull arall na ddefnyddir yn llai, sef defnyddio gwifren gopr dim ond lle mae ei angen, ond ni fyddwn yn siarad amdano yma.

Positive photoresists are made from photosensitizers that dissolve under illumination. There are many ways to treat photoresist on copper, but the most common way is to heat it and roll it over a surface containing photoresist. It can also be sprayed in liquid form, but the dry film provides higher resolution and allows for thinner wires. Dim ond templed ar gyfer gwneud haenau PCB yw’r cwfl. Mae cwfl sy’n gorchuddio’r ffotoresist ar y PCB yn atal rhai rhannau o’r ffotoresist rhag cael eu dinoethi nes bod y ffotoresist yn agored i olau UV. These areas, which are covered with photoresist, will become wiring. Other bare copper parts to be etched after photoresist development. The etching process may involve dipping the board into the etching solvent or spraying the solvent onto the board. Generally used as etching solvent using ferric chloride etc. After etching, remove the remaining photoresist.

1. Wiring width and current

General width should not be less than 0.2mm (8mil)

On high density and high precision PCBS, pitch and line width are generally 0.3mm (12mil).

Pan fydd trwch ffoil copr tua 50wm, lled y wifren yw 1 ~ 1.5mm (60mil) = 2A

The common ground is generally 80mil, especially for applications with microprocessors.

2. Pa mor uchel yw amlder bwrdd cyflym?

Pan fydd codiad / cwymp yr amser signal “3 ~ 6 gwaith yr amser trosglwyddo signal, fe’i hystyrir yn signal cyflymder uchel.

Ar gyfer cylchedau digidol, yr allwedd yw edrych ar serth ymyl y signal, yr amser y mae’n ei gymryd i godi a chwympo,

According to a very classic book “High Speed Digtal Design” theory, the signal from 10% to 90% of the time is less than 6 times the wire delay, is high-speed signal! – – – – – – sef! Even 8KHz square wave signals, as long as the edges are steep enough, are still high-speed signals, and transmission line theory needs to be used in wiring

Pentyrru a haenu 3.PCB

The four – layer plate has the following stacking sequence. Esbonnir manteision ac anfanteision lamineiddio gwahanol:

Dylai’r achos cyntaf fod y gorau o’r pedair haen. Because the outer layer is the stratum, it has a shielding effect on EMI. Meanwhile, the power supply layer is reliable and close to the stratum, which makes the internal resistance of the power supply smaller and achieves the best suburbs. Fodd bynnag, ni ellir defnyddio’r achos cyntaf pan fo dwysedd y bwrdd yn gymharol uchel. Because then, the integrity of the first layer is not guaranteed, and the second layer signal is worse. In addition, this structure can not be used in the case of large power consumption of the whole board.

The second case is the one we usually use the most. O strwythur y bwrdd, nid yw’n addas ar gyfer dylunio cylched digidol cyflym. Mae’n anodd cynnal rhwystriant pŵer isel yn y strwythur hwn. Take a plate 2 mm as an example: Z0=50ohm. To line width of 8mil. Copper foil thickness is 35цm. Felly mae’r haen signal a chanol y ffurfiad yn 0.14mm. The formation and power layer are 1.58mm. This greatly increases the internal resistance of the power supply. In this kind of structure, because the radiation is to the space, shielding plate is needed to reduce EMI.

In the third case, the signal line on layer S1 has the best quality. S2. Cysgodi EMI. But the power supply impedance is large. This board can be used when the power consumption of the whole board is high and the board is an interference source or adjacent to the interference source.

4. Paru rhwystriant

Mae osgled y signal foltedd wedi’i adlewyrchu yn cael ei bennu gan y cyfernod adlewyrchiad ffynhonnell ρ S a’r cyfernod adlewyrchu llwyth ρL

ρL = (RL-z0)/(RL + Z0) and ρS = (rS-z0)/(RS + Z0)

In the above equation, if RL=Z0, the load reflection coefficient ρL=0. If RS=Z0 source-end reflection coefficient ρS=0.

Because the ordinary transmission line impedance Z0 should usually meet the requirements of 50 ω 50 ω, and the load impedance is usually in thousands of ohms to tens of thousands of ohms. Felly, mae’n anodd sylweddoli paru rhwystriant ar ochr y llwyth. However, because the signal source (output) impedance is usually relatively small, roughly in the tens of ohms. Felly mae’n llawer haws gweithredu paru rhwystriant yn y ffynhonnell. If a resistor is connected at the load end, the resistor will absorb part of the signal to the detriment of transmission (my understanding). When the TTL/CMOS standard 24mA drive current is selected, its output impedance is approximately 13 ω. If the transmission line impedance Z0=50 ω, then a 33 ω source-end matching resistor should be added. 13 ω +33 ω =46 ω (approximately 50 ω, weak underdamping helps signal setup time)

When other transmission standards and drive currents are selected, the matching impedance can be different. In high-speed logic and circuit design, for some key signals, such as clock, control signals, we recommend that the source matching resistor must be added.

In this way, the connected signal will be reflected back from the load side, because the source impedance matches, the reflected signal will not be reflected back.