Konsepsyon PCB lè zafè ki bezwen atansyon

Pale de Komisyon Konsèy PCB, many friends will think that it can be seen everywhere around us, from all household appliances, all kinds of accessories in the computer, to all kinds of digital products, as long as electronic products almost all use PCB board, so what is PCB board? A PCB is a PrintedCircuitBlock, which is a printed circuit board for electronic components to be inserted. A copperplated base plate is printed and etched out of the etching circuit.

ipcb

Komisyon Konsèy PCB ka divize an tablo sèl kouch, tablo doub kouch ak tablo milti kouch. Konpozan elektwonik yo entegre nan PCB la. Sou yon PCB debaz yon sèl kouch, eleman yo konsantre sou yon bò ak fil yo konsantre sou lòt la. Se konsa, nou bezwen fè twou nan tablo a pou ke broch yo ka ale nan tablo a lòt bò a, se konsa broch yo nan pati pyès sa yo soude sou lòt bò a. Because of this, the positive and negative sides of such PCB are respectively called ComponentSide and SolderSide.

A double-layer board can be seen as two single-layer boards glued together, with electronic components and wiring on both sides of the board. Pafwa li nesesè konekte yon fil sèl soti nan yon sèl bò nan lòt bò a nan tablo a nan yon twou gid (via). Twou Gid yo se ti twou nan PCB la plen oswa kouvwi ak metal ki ka konekte nan fil sou tou de bò yo. Koulye a, anpil mèr òdinatè yo ap itilize 4 oswa menm 6 kouch tablo PCB, pandan y ap kat grafik jeneralman itilize 6 kouch tablo PCB. Anpil-wo fen grafik kat tankou seri nVIDIAGeForce4Ti itilize 8 kouch tablo PCB, ki rele milti-kouch tablo PCB. The problem of connecting lines between layers is also encountered on multi-layer PCBS, which can also be achieved through guide holes.

Paske li se yon PCB milti-kouch, pafwa twou yo gid pa bezwen rantre PCB a tout antye. Twou gid sa yo rele Buriedvias ak Blindvias paske yo sèlman penetre kèk kouch. Twou avèg konekte plizyè kouch entèn PCBS nan sifas PCBS san yo pa penetre tablo a tout antye. Twou antere yo sèlman konekte ak PCB entèn la, kidonk limyè a pa vizib nan sifas la. Nan yon PCB multikouch, kouch la tout antye dirèkteman konekte nan fil tè a ak ekipman pou pouvwa a. Se konsa, nou klase kouch yo kòm siyal, pouvwa oswa tè. Si pati pyès sa yo sou PCB la mande pou ekipman pou pouvwa diferan, yo anjeneral gen plis pase de kouch pouvwa ak fil. The more layers you use, the higher the cost. Of course, the use of more layers of PCB board to provide signal stability is very helpful.

The process of making a professional PCB board is quite complicated. Take a 4-layer PCB board for example. PCB tablo prensipal la se sitou 4 kouch. Lè fabrikasyon, mitan kouch yo woule, koupe, grave, soksid ak galvanize respektivman. Kat kouch yo se sifas eleman, kouch pouvwa, strat ak laminasyon soude respektivman. Kat kouch yo Lè sa a, bourade ansanm yo fòme yon PCB pou tablo prensipal la. Then the holes were punched and made. Apre netwaye, ekstèn de kouch liy lan enprime, kwiv, grave, tès, kouch rezistans soude, enprime ekran. Finalman, PCB an antye (ki gen ladan anpil mèr) mete so nan PCB nan chak mèr, ak Lè sa a, anbalaj vakyòm te pote soti apre yo fin pase tès la. If the copper skin is not well coated in THE process of PCB production, there will be poor adhesion phenomenon, easy to imply short circuit or capacitance effect (easy to cause interference). The holes on PCB must also be taken care of. If the hole is punched not in the middle, but on one side, it will result in uneven matching or easy contact with the power supply layer or formation in the middle, resulting in potential short-circuiting or bad grounding factors.

Copper wiring process

The first step in fabrication is to establish an online wiring between parts. We use negative transfer to express the working negative on a metal conductor. Trick a se gaye yon kouch mens nan FOIL kwiv sou sifas la tout antye epi retire nenpòt ki depase. Transfè ajoute se yon lòt metòd mwens itilize, ki se aplike fil kwiv sèlman kote li nesesè, men nou pa pral pale sou li isit la.

Positive photoresists are made from photosensitizers that dissolve under illumination. There are many ways to treat photoresist on copper, but the most common way is to heat it and roll it over a surface containing photoresist. It can also be sprayed in liquid form, but the dry film provides higher resolution and allows for thinner wires. Hood la se jis yon modèl pou fè kouch PCB. Yon kapo ki kouvri fotorezist sou pkb la anpeche kèk zòn fotorezist la ekspoze jiskaske fotorezist la ekspoze a limyè UV. These areas, which are covered with photoresist, will become wiring. Lòt pati kòb kwiv mete yo dwe grave apre devlopman photoresist. The etching process may involve dipping the board into the etching solvent or spraying the solvent onto the board. Anjeneral itilize kòm grave sòlvan lè l sèvi avèk klori ferrik elatriye. After etching, remove the remaining photoresist.

1. lajè fil elektrik ak aktyèl

General width should not be less than 0.2mm (8mil)

On high density and high precision PCBS, pitch and line width are generally 0.3mm (12mil).

Lè epesè nan fèy kwiv se apeprè 50um, lajè fil la se 1 ~ 1.5mm (60mil) = 2A

Tè a komen se jeneralman 80mil, espesyalman pou aplikasyon pou ak mikroproseseur.

2. Ki jan segondè a se frekans nan tablo segondè-vitès?

Lè monte / tonbe nan tan siyal la “3 ~ 6 fwa tan transmisyon siyal la, li konsidere kòm siyal gwo vitès.

Pou sikwi dijital, kle a se fè yon gade nan apik la kwen nan siyal la, tan li pran yo monte ak tonbe,

According to a very classic book “High Speed Digtal Design” theory, the signal from 10% to 90% of the time is less than 6 times the wire delay, is high-speed signal! – – – – – – savwa! Even 8KHz square wave signals, as long as the edges are steep enough, are still high-speed signals, and transmission line theory needs to be used in wiring

3.PCB anpile ak stratifikasyon

The four – layer plate has the following stacking sequence. Avantaj ak dezavantaj nan laminasyon diferan yo eksplike anba a:

Premye ka a ta dwe pi bon nan kat kouch yo. Because the outer layer is the stratum, it has a shielding effect on EMI. Meanwhile, the power supply layer is reliable and close to the stratum, which makes the internal resistance of the power supply smaller and achieves the best suburbs. Sepandan, premye ka a pa ka itilize lè dansite tablo a relativman wo. Paske lè sa a, entegrite nan kouch nan premye pa garanti, ak siyal la kouch dezyèm se vin pi mal. Anplis de sa, estrikti sa a pa ka itilize nan ka gwo konsomasyon pouvwa nan tablo a tout antye.

The second case is the one we usually use the most. Soti nan estrikti a nan tablo a, li pa apwopriye pou gwo vitès konsepsyon sikwi dijital. Li difisil pou kenbe enpedans pouvwa ki ba nan estrikti sa a. Take a plate 2 mm as an example: Z0=50ohm. To line width of 8mil. Copper foil thickness is 35цm. Se konsa, kouch siyal la ak mitan fòmasyon an se 0.14mm. The formation and power layer are 1.58mm. This greatly increases the internal resistance of the power supply. In this kind of structure, because the radiation is to the space, shielding plate is needed to reduce EMI.

In the third case, the signal line on layer S1 has the best quality. S2. EMI pwoteksyon. But the power supply impedance is large. This board can be used when the power consumption of the whole board is high and the board is an interference source or adjacent to the interference source.

4. matche enpedans

Se anplitid siyal la vòltaj reflete detèmine pa koyefisyan nan refleksyon sous ρ S ak koyefisyan nan refleksyon chaj ρL

ρL = (RL-z0)/(RL + Z0) and ρS = (rS-z0)/(RS + Z0)

Nan ekwasyon ki anwo a, si RL = Z0, koyefisyan refleksyon chaj ρL = 0. Si RS = Z0 sous-fen koyefisyan refleksyon ρS = 0.

Paske liy transmisyon òdinè enpedans Z0 la ta dwe anjeneral satisfè kondisyon ki nan 50 ω 50 ω, ak enpedans nan chaj se nòmalman nan dè milye de om a dè dizèn de milye de om. Se poutèt sa, li difisil a reyalize enpedans matche nan bò a chaj. Sepandan, paske sous siyal la (pwodiksyon) enpedans se nòmalman relativman ti, apeprè nan dè dizèn de om. Se poutèt sa se pi fasil aplike enpedans matche nan sous la. Si yon rezistans ki konekte nan fen chaj la, rezistans la pral absòbe yon pati nan siyal la nan detriman nan transmisyon (konpreyansyon mwen). Lè TTL / CMOS estanda 24mA aktyèl kondwi a chwazi, enpedans pwodiksyon li se apeprè 13 ω. Si liy lan transmisyon enpedans Z0 = 50 ω, Lè sa a, yo ta dwe ajoute yon 33 ω sous-fen matche rezistans. 13 ω +33 ω = 46 ω (apeprè 50 ω, fèb underdamping ede tan konfigirasyon siyal)

Lè lòt estanda transmisyon ak kouran kondwi yo chwazi, enpedans matche a ka diferan. Nan gwo vitès lojik ak konsepsyon sikwi, pou kèk siyal kle, tankou revèy, siyal kontwòl, nou rekòmande pou reziste matche sous la dwe ajoute.

Nan fason sa a, siyal la konekte ap reflete tounen soti nan bò a chaj, paske enpedans nan sous matche ak, siyal la reflete pa pral reflete tounen.