PCB wiring will affect the subsequent PCB Assembly processing. We should fully consider the line width and line spacing of the wiring, the connection between the wire and the chip component pad, the wire and the SOIC, PLCC, QFP, SOT and other devices in the PCB design stage. The relationship between pad connection, line width and current, only when these problems are well dealt with, can a high-quality PCBA board be processed.

1. Wiring range

The size requirements of the wiring range are as shown in the table, including the size of the inner and outer layers and the copper foil to the edge of the board and the non-metalized hole wall.

2. The line width and line spacing of the wiring

In the case of PCBA assembly processing density permitting, lower density wiring design should be used as much as possible to improve defect-free and reliable manufacturing capabilities. At present, the processing capacity of general manufacturers is: the minimum line width is 0.127mm (5mil), and the minimum line spacing is 0.127mm (5mil). Commonly used wiring density design reference is shown in the table.

3. The connection between the wire and the pad of the chip component

When connecting wires and chip components, in principle, they can be connected at any point. However, for chip components that are welded by reflow welding, it is best to design according to the following principles.

a. For components installed with two pads, such as resistors and capacitors, the printed wires connected to their pads should preferably be drawn symmetrically from the center of the pad, and the printed wires connected to the pad must have the same width. For lead wires with a line width of less than 0.3mm (12mil), this provision can be disregarded.

b. For the pads connected to a wider printed wire, it is better to pass through a narrow printed wire transition in the middle. This narrow printed wire is usually called the “insulation path”, otherwise, for 2125 (English is 0805) ) And the following chip-type SMDs are prone to “standing chip” defects during welding. The specific requirements are shown in the figure.

4. Wires are connected to the pads of SOIC, PLCC, QFP, SOT and other devices

When connecting the circuit to the pad of SOIC, PLCC, QFP, SOT and other devices, it is generally recommended to lead the wire from both ends of the pad, as shown in the figure.

5. The relationship between line width and current

When the signal average current is relatively large, the relationship between line width and current needs to be considered. For specific parameters, please refer to the following table. In PCB design and processing, oz (ounce) is often used as the thickness unit of copper foil. 1oz copper thickness is defined as the weight of copper foil in an area of ​​one square inch, which corresponds to a physical thickness of 35μm. When the copper foil is used as a wire and a large current is passed, the relationship between the width of the copper foil and the current carrying capacity should be derated by 50% with reference to the data in the table.