In design, layout is an important part. The quality of the layout result will directly affect the effect of the wiring, so it can be considered that a reasonable layout is the first step to a successful PCB design. Especially the pre-layout is the process of thinking about the entire circuit board, signal flow, heat dissipation, structure and other structures. If the pre-layout fails, no amount of effort will be needed.

PCB layout design The design process flow of printed circuit boards includes schematic design, electronic component database registration, design preparation, block division, electronic component configuration, configuration confirmation, wiring and final inspection. In the process of the process, no matter which process is found to be a problem, it must be returned to the previous process for reconfirmation or correction.

Wannan labarin ya fara gabatar da ƙa’idodin ƙirar ƙirar PCB da dabaru, sannan ya bayyana yadda ake ƙira da duba shimfidar PCB, daga buƙatun DFM na layout, buƙatun ƙirar thermal, buƙatun amincin sigina, buƙatun EMC, saitunan Layer da buƙatun rarraba ƙasa, da ikon kayayyaki. Za a yi nazari dalla-dalla da buƙatun da sauran abubuwan, kuma ku bi editan don gano cikakkun bayanai.

PCB layout zane dokokin

1. A karkashin yanayi na al’ada, duk abubuwan da aka gyara ya kamata a shirya su a kan wannan farfajiya na allon kewayawa. Sai kawai lokacin da abubuwan da ke saman matakin suka yi yawa, za a iya shigar da wasu na’urori masu iyakacin tsayi da ƙarancin zafi, kamar su chip resistors, capacitors, da capacitors na guntu. Chip IC, da dai sauransu ana sanya su a kan ƙananan Layer.

2. A ƙarƙashin tsarin tabbatar da aikin lantarki, ya kamata a sanya abubuwan da aka gyara a kan grid kuma a tsara su a layi daya ko daidai da juna don zama mai kyau da kyau. A ƙarƙashin yanayi na al’ada, ba a ba da izinin abubuwan haɗin gwiwa su zoba; tsarin abubuwan da aka gyara ya kamata ya zama m, kuma ya kamata a shirya abubuwan da aka gyara a kan dukkanin shimfidar wuri. Rarraba iri ɗaya ne kuma mai yawa.

3. The minimum distance between adjacent land patterns of different components on the circuit board should be above 1mm.

4. Nisa daga gefen allon kewayawa gabaɗaya bai zama ƙasa da 2MM ba. Mafi kyawun siffa na allon kewayawa shine rectangular, kuma yanayin yanayin shine 3: 2 ko 4: 3. Lokacin da girman allon kewayawa ya fi 200MM ta 150MM, la’akari da abin da allon kewayawa zai iya jure ƙarfin injina.

PCB layout design skills

A cikin ƙirar ƙirar PCB, ya kamata a bincika raka’a na allon kewayawa, kuma ƙirar shimfidar ya kamata ta dogara da aikin farawa. Lokacin tsara duk abubuwan da ke cikin da’ira, yakamata a cika waɗannan ka’idoji:

1. Shirya matsayi na kowace naúrar da’ira mai aiki bisa ga magudanar da’ira, ta yadda tsarin ya dace don zagayawan sigina, kuma ana kiyaye siginar a hanya ɗaya gwargwadon iyawa [1].

2. Take the core components of each functional unit as the center and lay out around him. The components should be uniformly, integrally and compactly arranged on the PCB to minimize and shorten the leads and connections between the components.

3. Don da’irori da ke aiki a manyan mitoci, dole ne a yi la’akari da sigogin rarraba tsakanin sassan. A cikin da’irori na gaba ɗaya, ya kamata a shirya abubuwan da aka gyara a cikin layi daya kamar yadda zai yiwu, wanda ba kawai kyau ba ne, amma kuma mai sauƙin shigarwa da sauƙi don samar da taro.

Yadda ake tsarawa da duba shimfidar PCB

1. DFM requirements for layout

1. An ƙaddara mafi kyawun hanyar tsari, kuma an sanya duk na’urori a kan jirgi.

2. The origin of the coordinates is the intersection of the left and lower extension lines of the board frame, or the lower left pad of the lower left socket.

3. The actual size of the PCB, the location of the positioning device, etc. are consistent with the process structure element map, and the device layout of the area with restricted device height requirements meets the requirements of the structure element map.

4. Matsayin maɓallin bugun kira, na’urar sake saiti, haske mai nuna alama, da dai sauransu ya dace, kuma mashaya mai mahimmanci baya tsoma baki tare da na’urorin da ke kewaye.

5. Ƙaƙwalwar waje na allon yana da radiyo mai santsi na 197mil, ko an tsara shi bisa ga girman girman zane.

6. Talakawa allon suna da gefuna 200mil; gefen hagu da dama na jirgin baya suna da gefuna na tsari fiye da 400mil, kuma na sama da na ƙasa suna da gefuna masu girma fiye da 680mil. Sanya na’urar baya cin karo da wurin buɗe taga.

7. All kinds of additional holes (ICT positioning hole 125mil, handle bar hole, elliptical hole and fiber holder hole) that need to be added are all missing and set correctly.

8. Fitin fil ɗin na’urar, jagorar na’ura, filin na’urar, ɗakin karatu na na’ura, da dai sauransu waɗanda aka sarrafa ta hanyar siyar da igiyoyin ruwa suna la’akari da buƙatun siyarwar igiyar ruwa.

9. The device layout spacing meets the assembly requirements: surface mount devices are greater than 20mil, IC is greater than 80mil, and BGA is greater than 200mil.

10. The crimping sassa da fiye da 120 mils a cikin bangaren surface nisa, kuma babu na’urar a cikin ta wurin yanki na crimping sassa a kan waldi surface.

11. Babu gajerun na’urori tsakanin dogayen na’urori, kuma babu na’urorin faci da gajere da ƙananan na’urori masu shiga tsakani da aka sanya a cikin 5mm tsakanin na’urori masu tsayi fiye da 10mm.

12. Na’urorin Polar suna da tambarin siliki na polarity. Kwatancen X da Y na nau’in nau’in nau’ikan abubuwan toshe-in-sha’awa iri ɗaya ne.

13. All devices are clearly marked, no P*, REF, etc. are not clearly marked.

14. Akwai siginan sakawa guda 3 akan saman da ke ɗauke da na’urorin SMD, waɗanda aka sanya su cikin siffar “L”. Nisa tsakanin tsakiyar siginan sakawa da gefen allon ya fi mil 240 girma.

15. Idan kana buƙatar yin aikin hawan jirgi, ana la’akari da layout don sauƙaƙe aikin jirgi da PCB aiki da haɗuwa.

16. Ya kamata a cika gefuna da aka yanke (gefukan da ba su da kyau) ta hanyar ƙwanƙolin milling da ramukan hatimi. Ramin hatimi mara ƙarfe ne mara ƙarfe, gabaɗaya mil 40 a diamita da mil 16 daga gefen.

17. The test points used for debugging have been added in the schematic diagram, and they are placed appropriately in the layout.

Na biyu, buƙatun ƙirar thermal na shimfidawa

1. Heating components and exposed components of the casing are not in close proximity to wires and heat-sensitive components, and other components should also be properly kept away.

2. The placement of the radiator takes into account the convection problem, and there is no interference of high components in the projection area of ​​the radiator, and the range is marked on the mounting surface with silk screen.

3. Tsarin yana la’akari da tashoshi masu rarraba zafi masu dacewa da santsi.

4. Ya kamata a raba ma’aunin wutar lantarki da kyau daga na’urar zafi mai zafi.

5. Yi la’akari da zubar da zafi na na’urori masu ƙarfi da na’urori a ƙarƙashin gusset.

Na uku, buƙatun amincin sigina na shimfidar wuri

1. The start-end matching is close to the sending device, and the end matching is close to the receiving device.

2. Place decoupling capacitors close to related devices

3. Place crystals, crystal oscillators and clock drive chips close to related devices.

4. Babban sauri da ƙananan sauri, dijital da analog an shirya su daban bisa ga kayayyaki.

5. Ƙayyade tsarin topological na bas ɗin bisa ga sakamakon bincike da kwaikwayo ko ƙwarewar da ake ciki don tabbatar da cewa an cika bukatun tsarin.

6. If it is to modify the board design, simulate the signal integrity problem reflected in the test report and give a solution.

7. The layout of the synchronous clock bus system meets the timing requirements.

Hudu, EMC bukatun

1. Inductive devices that are prone to magnetic field coupling, such as inductors, relays, and transformers, should not be placed close to each other. When there are multiple inductance coils, the direction is vertical and they are not coupled.

2. Don kauce wa tsangwama na lantarki tsakanin na’urar da ke kan farfajiyar walda na allon guda ɗaya da kuma allon da ke kusa da shi, ba za a sanya na’urori masu mahimmanci da na’urorin radiation masu karfi a kan farfajiyar walda na allon daya ba.

3. The interface components are placed close to the edge of the board, and appropriate EMC protection measures have been taken (such as shielding shells, hollowing out of the power supply ground, etc.) to improve the EMC capability of the design.

4. Ana sanya shingen kariya a kusa da kewayawa, bin ka’idar kariya ta farko sannan kuma tacewa.

5. Nisa daga jikin garkuwar jiki da harsashi na garkuwa zuwa jikin garkuwar garkuwar jiki da harsashi na kariya ya fi mils 500 don na’urorin da ke da ƙarfin watsawa ko musamman (kamar oscillators crystal, lu’ulu’u, da sauransu).

6. A 0.1uF capacitor is placed near the reset line of the reset switch to keep the reset device and reset signal away from other strong devices and signals.

Five, layer setting and power supply and ground division requirements

1. Lokacin da siginar siginar guda biyu ke kusa da juna kai tsaye, dole ne a ayyana ka’idodin wayoyi a tsaye.

2. Babban ƙarfin wutar lantarki yana kusa da layin ƙasa mai dacewa kamar yadda zai yiwu, kuma ƙarfin wutar lantarki ya hadu da ka’idar 20H.

3. Each wiring layer has a complete reference plane.

4. Multi-Layer allon an laminated da core abu (CORE) ne m don hana warping lalacewa ta hanyar m rarraba jan fata yawa da kuma asymmetrical kauri daga cikin matsakaici.

5. Kauri daga cikin jirgi kada ya wuce 4.5mm. Ga waɗanda ke da kauri fiye da 2.5mm (jigon baya da ya fi 3mm), ya kamata masu fasaha su tabbatar da cewa babu matsala game da sarrafa PCB, haɗawa, da kayan aiki, kuma kauri na allon katin PC shine 1.6mm.

6. Lokacin da kauri-to-diamita rabo daga cikin via ne mafi girma fiye da 10: 1, shi za a tabbatar da PCB manufacturer.

7. The power and ground of the optical module are separated from other power and ground to reduce interference.

8. Ƙarfin wutar lantarki da ƙasa na kayan aiki masu mahimmanci sun cika bukatun.

9. Lokacin da ake buƙatar kulawar impedance, sigogin saitin Layer sun cika buƙatun.

Six, power module requirements

1. Tsarin sashin samar da wutar lantarki yana tabbatar da cewa shigarwar shigarwa da layin fitarwa suna da santsi kuma ba su ketare ba.

2. Lokacin da allon guda ɗaya ya ba da wuta ga ƙaramin allo, sanya madaidaicin kewayawar tace kusa da wurin wutar lantarki na allo ɗaya da mashigar wutar lantarki na ƙaramin allo.

Bakwai, sauran bukatu

1. Tsarin yana yin la’akari da cikakken santsi na wayoyi, kuma babban bayanan bayanai yana da ma’ana.

2. Daidaita ayyukan fil na keɓe, FPGA, EPLD, direban bas da sauran na’urori bisa ga sakamakon shimfidar wuri don haɓaka shimfidar wuri.

3. Tsarin yana yin la’akari da haɓakar da ya dace na sararin samaniya a cikin wayoyi masu yawa don kauce wa halin da ba za a iya ba da shi ba.

4. Idan kayan aiki na musamman, na’urori na musamman (kamar 0.5mmBGA, da dai sauransu), da kuma matakai na musamman an karɓa, an yi la’akari da lokacin bayarwa da kuma aiwatarwa, kuma an tabbatar da su ta hanyar masana’antun PCB da ma’aikata.

5. An tabbatar da ma’aunin madaidaicin fil na mai haɗa gusset don hana jagora da daidaitawa na haɗin gusset daga juyawa.

6. If there are ICT test requirements, consider the feasibility of adding ICT test points during layout, so as to avoid difficulty in adding test points during the wiring phase.

7. When a high-speed optical module is included, the layout of the optical port transceiver circuit is prioritized.

8. Bayan kammala shimfidar wuri, an ba da zane na 1: 1 don ma’aikatan aikin don duba ko zaɓin kunshin na’urar daidai ne a kan mahaɗin na’urar.

9. A bude taga, an yi la’akari da jirgin na ciki ya koma baya, kuma an kafa wurin da aka haramta wayoyi masu dacewa.