In design, layout is an important part. The quality of the layout result will directly affect the effect of the wiring, so it can be considered that a reasonable layout is the first step to a successful PCB design. Especially the pre-layout is the process of thinking about the entire circuit board, signal flow, heat dissipation, structure and other structures. If the pre-layout fails, no amount of effort will be needed.

PCB layout design The design process flow of printed circuit boards includes schematic design, electronic component database registration, design preparation, block division, electronic component configuration, configuration confirmation, wiring and final inspection. In the process of the process, no matter which process is found to be a problem, it must be returned to the previous process for reconfirmation or correction.

Ity lahatsoratra ity dia mampahafantatra voalohany ny fitsipika sy ny teknika famolavolana drafitra PCB, ary avy eo dia manazava ny fomba famolavolana sy fanaraha-maso ny fisehon’ny PCB, avy amin’ny fepetra takian’ny DFM ny layout, ny fepetra takian’ny famolavolana mafana, ny fepetra takian’ny mari-pamantarana, ny fepetra takian’ny EMC, ny fametrahana sosona sy ny fepetra takian’ny fizarana fahefana, ary herinaratra Modules. Ny fepetra takiana sy ny lafiny hafa dia hodinihina amin’ny antsipiriany, ary araho ny tonian-dahatsoratra hahitana ny antsipiriany.

PCB drafitra famolavolana fitsipika

1. Amin’ny toe-javatra mahazatra, ny singa rehetra dia tokony halamina eo amin’ny lafiny iray amin’ny solaitrabe. Rehefa matevina loatra ny singa ambony indrindra, dia azo apetraka ny fitaovana sasany manana haavo voafetra sy famokarana hafanana ambany, toy ny resistor chip, capacitor chip, ary capacitor chip. Ny chip IC, sns dia apetraka eo amin’ny sosona ambany.

2. Eo ambanin’ny foto-kevitra hiantohana ny fampandehanana elektrika, ny singa dia tokony hapetraka eo amin’ny grid ary alamina mifanandrify na mifanandrify mba ho madio sy tsara tarehy. Amin’ny toe-javatra mahazatra, ny singa dia tsy avela hifanindry; ny fandaminana ny singa dia tokony ho mirindra, ary ny singa dia tokony halamina amin`ny drafitra manontolo. Ny fizarana dia mitovitovy sy matevina.

3. The minimum distance between adjacent land patterns of different components on the circuit board should be above 1mm.

4. Ny halavirana amin’ny sisin’ny board dia matetika tsy latsaky ny 2MM. Ny endrika tsara indrindra amin’ny solaitrabe dia mahitsizoro, ary ny aspect ratio dia 3: 2 na 4: 3. Rehefa lehibe kokoa noho ny 200MM amin’ny 150MM ny haben’ny biraon’ny faritra, dia diniho hoe inona no mahazaka ny herin’ny mekanika.

PCB layout design skills

Ao amin’ny famolavolana drafitra ny PCB, ny singa ao amin’ny biraon’ny faritra dia tokony hodinihina, ary ny famolavolana drafitra dia tokony hiorina amin’ny asa fanombohana. Rehefa mametraka ny singa rehetra ao amin’ny circuit dia tokony hanaraka ireto fitsipika manaraka ireto:

1. Alaharo araka ny fikorianan’ny faritra ny toeran’ny tarika tsirairay miasa, mba ho mora amin’ny fivezivezena famantarana ny lamina, ary tazonina amin’ny lalana mitovy araka izay azo atao ny famantarana [1].

2. Take the core components of each functional unit as the center and lay out around him. The components should be uniformly, integrally and compactly arranged on the PCB to minimize and shorten the leads and connections between the components.

3. Ho an’ny faritra miasa amin’ny onjam-peo avo, ny mari-pamantarana fizarana eo amin’ny singa dia tsy maintsy jerena. Amin’ny faritra ankapobeny, ny singa dia tokony halamina araka izay azo atao, izay tsy hoe tsara tarehy, fa mora ny mametraka ary mora ny vokatra faobe.

Ahoana ny fomba famolavolana sy fanaraha-maso ny fisehon’ny PCB

1. DFM requirements for layout

1. Voafaritra ny lalan’ny dingana tsara indrindra, ary napetraka eo amin’ny solaitrabe ny fitaovana rehetra.

2. The origin of the coordinates is the intersection of the left and lower extension lines of the board frame, or the lower left pad of the lower left socket.

3. The actual size of the PCB, the location of the positioning device, etc. are consistent with the process structure element map, and the device layout of the area with restricted device height requirements meets the requirements of the structure element map.

4. Ny toerana misy ny dial switch, reset fitaovana, famantarana jiro, sns dia mety, ary ny tahony bar dia tsy hanelingelina ny fitaovana manodidina.

5. Ny rafitra ivelany amin’ny birao dia manana radianina malama 197mil, na natao araka ny sary habe ara-drafitra.

6. Ny boards tsotra dia manana sisiny 200mil; Ny ilany havia sy havanana amin’ny fiaramanidina dia manana sisiny fanodinana mihoatra ny 400mil, ary ny sisiny ambony sy ambany dia manana sisiny fanodinana mihoatra ny 680mil. Ny fametrahana ny fitaovana dia tsy mifanohitra amin’ny toerana fanokafana varavarankely.

7. All kinds of additional holes (ICT positioning hole 125mil, handle bar hole, elliptical hole and fiber holder hole) that need to be added are all missing and set correctly.

8. Ny fitaovana pin pitch, fitaovana fitarihana, fitaovana pitch, fitaovana trano famakiam-boky, sns izay efa nokarakaraina amin’ny onja soldering dia mandray ny fepetra takiana amin’ny onja soldering.

9. The device layout spacing meets the assembly requirements: surface mount devices are greater than 20mil, IC is greater than 80mil, and BGA is greater than 200mil.

10. Ny faritra crimping dia manana mihoatra ny 120 mils eo amin’ny elanelana ambonin’ny singa, ary tsy misy fitaovana amin’ny alalan’ny faritra ny crimping faritra eo amin’ny welding ambonin’ny.

11. Tsy misy fitaovana fohy eo anelanelan’ny fitaovana avo, ary tsy misy fitaovana fametahana sy fitaovana mifanelanelana fohy sy kely apetraka ao anatin’ny 5mm eo anelanelan’ireo fitaovana manana haavo mihoatra ny 10mm.

12. Ny fitaovana polar dia manana logos silkscreen polarity. Mitovy ny toromarika X sy Y amin’ny karazana plug-in polarized mitovy.

13. All devices are clearly marked, no P*, REF, etc. are not clearly marked.

14. Misy cursor 3 positioning eo amin’ny surface misy fitaovana SMD, izay apetraka amin’ny endrika “L”. Ny elanelana eo anelanelan’ny afovoan’ny cursor fametrahana sy ny sisin’ny solaitrabe dia mihoatra ny 240 mils.

15. Raha mila manao fanodinana boarding ianao, dia heverina ho manamora ny fanodinana ny boarding sy ny PCB ary ny fivoriambe.

16. Tokony hofenoina amin’ny alalan’ny fikosoham-bary sy lavaka fitotoana ny sisiny voapotsitra. Ny lavaka fitomboka dia banga tsy metaly, amin’ny ankapobeny dia 40 mils ny savaivony ary 16 mils avy amin’ny sisiny.

17. The test points used for debugging have been added in the schematic diagram, and they are placed appropriately in the layout.

Faharoa, ny fepetra takian’ny famolavolana mafana amin’ny layout

1. Heating components and exposed components of the casing are not in close proximity to wires and heat-sensitive components, and other components should also be properly kept away.

2. The placement of the radiator takes into account the convection problem, and there is no interference of high components in the projection area of ​​the radiator, and the range is marked on the mounting surface with silk screen.

3. Ny fisehon’ny drafitra dia mandinika ny fantsona fanaparitahana hafanana mety sy malama.

4. Ny capacitor electrolytique dia tokony hisaraka tsara amin’ny fitaovana hafanana avo.

5. Diniho ny fiparitahan’ny hafanana amin’ny fitaovana mahery vaika sy fitaovana eo ambanin’ny gusset.

Fahatelo, ny fepetra takian’ny tsy fivadihana famantarana amin’ny layout

1. The start-end matching is close to the sending device, and the end matching is close to the receiving device.

2. Place decoupling capacitors close to related devices

3. Place crystals, crystal oscillators and clock drive chips close to related devices.

4. Ny hafainganam-pandeha avo sy ny hafainganam-pandeha ambany, nomerika sy analoga dia nalamina misaraka araka ny modules.

5. Farito ny firafitry ny topolojika amin’ny fiara fitateram-bahoaka mifototra amin’ny valin’ny fanadihadiana sy ny simulation na ny traikefa efa misy mba hahazoana antoka fa mahafeno ny fepetra takian’ny rafitra.

6. If it is to modify the board design, simulate the signal integrity problem reflected in the test report and give a solution.

7. The layout of the synchronous clock bus system meets the timing requirements.

Efatra, fepetra EMC

1. Inductive devices that are prone to magnetic field coupling, such as inductors, relays, and transformers, should not be placed close to each other. When there are multiple inductance coils, the direction is vertical and they are not coupled.

2. Mba hisorohana ny fitsabahana electromagnetika eo amin’ny fitaovana eo amin’ny welding ambonin’ny birao tokana sy ny birao tokana mifanakaiky, tsy misy fitaovana saro-pady sy ny taratra mahery fitaovana tokony hapetraka eo amin’ny welding ambonin’ny birao tokana.

3. The interface components are placed close to the edge of the board, and appropriate EMC protection measures have been taken (such as shielding shells, hollowing out of the power supply ground, etc.) to improve the EMC capability of the design.

4. Ny faritra fiarovana dia napetraka eo akaikin’ny faritry ny interface, manaraka ny fitsipiky ny fiarovana voalohany ary avy eo ny sivana.

5. Ny halaviran’ny vatana miaro sy ny akorandriaka miaro amin’ny vatana miaro sy ny akorandriaka fiarovana dia mihoatra ny 500 mils ho an’ny fitaovana manana hery fampitana avo na saro-pady indrindra (toy ny oscillator kristaly, kristaly, sns.).

6. A 0.1uF capacitor is placed near the reset line of the reset switch to keep the reset device and reset signal away from other strong devices and signals.

Five, layer setting and power supply and ground division requirements

1. Rehefa misy sosona famantarana roa mifanakaiky mivantana, dia tsy maintsy faritana ny fitsipika momba ny tariby mitsangana.

2. Ny soson-kery lehibe dia mifanakaiky amin’ny sosona tany mifanaraka aminy araka izay azo atao, ary mahafeno ny fitsipika 20H ny sosona herinaratra.

3. Each wiring layer has a complete reference plane.

4. Maro-sosona boards dia laminated ary ny fototra akora (CORE) dia symmetrical mba hisorohana warping vokatry ny uneven fizarana ny varahina hakitroky ny hoditra sy ny asymmetrical hatevin’ny antonony.

5. Ny hatevin’ny solaitrabe dia tsy tokony hihoatra ny 4.5mm. Ho an’ireo izay manana hatevin’ny mihoatra ny 2.5mm (backplane lehibe kokoa noho 3mm), ny teknisiana dia tokony ho nanamafy fa tsy misy olana amin’ny PCB fanodinana, fivoriambe sy ny fitaovana, ary ny hatevin’ny PC karatra board dia 1.6mm.

6. Rehefa lehibe kokoa noho ny 10: 1 ny haavon’ny savaivony amin’ny savaivony, dia hohamafisin’ny mpanamboatra PCB izany.

7. The power and ground of the optical module are separated from other power and ground to reduce interference.

8. Mahafeno ny fepetra takiana ny fanodinana herinaratra sy tany amin’ireo singa fototra.

9. Rehefa ilaina ny fanaraha-maso impedance, dia mahafeno ny fepetra takiana ny masontsivana fametrahana sosona.

Six, power module requirements

1. The layout of the power supply part ensures that the input and output lines are smooth and do not cross.

2. Rehefa manome hery ny zana-kazo ny birao tokana, dia apetraho eo akaikin’ny fivoahan’ny herinaratra ao amin’ny solaitrabe sy ny fidiran’ny herinaratra ao amin’ny zana-kazo ny fizaran-tany sivana mifanaraka amin’izany.

Seven, other requirements

1. Ny fisehon’ny fisehon’ny dia mandray kajy ny ankapobeny smoothness ny wiring, ary ny tena fikorianan’ny data dia mety.

2. Amboary ny fanendrena pin amin’ny fanilihana, FPGA, EPLD, mpamily fiara fitateram-bahoaka ary fitaovana hafa mifanaraka amin’ny valin’ny fandrindrana mba hanatsarana ny layout.

3. Ny fandrindrana dia mandinika ny fitomboan’ny habaka amin’ny tariby matevina mba hialana amin’ny toe-javatra tsy azo alefa.

4. Raha fitaovana manokana, fitaovana manokana (toy ny 0.5mmBGA, sns.), Ary ny dingana manokana dia raisina, ny fe-potoana fanaterana sy ny processability dia nodinihina tanteraka, ary nohamafisin’ny mpanamboatra PCB sy ny mpiasan’ny dingana.

5. Ny pin mifanaraka amin’ny fifandraisana gusset dia nohamafisina mba hisorohana ny fitarihana sy ny orientation ny gusset connector tsy hivadika.

6. If there are ICT test requirements, consider the feasibility of adding ICT test points during layout, so as to avoid difficulty in adding test points during the wiring phase.

7. When a high-speed optical module is included, the layout of the optical port transceiver circuit is prioritized.

8. Rehefa vita ny fandrafetana, dia nisy sary mivondrona 1: 1 nomena ho an’ny mpiasan’ny tetikasa mba hanamarinana raha marina ny fifantenana ny fonosana amin’ny fitaovana.

9. Amin’ny fisokafan’ny varavarankely, ny fiaramanidina anatiny dia noheverina ho nihemotra, ary napetraka ny faritra fandrarana fanerena mety.