1. The signal line that needs to be impedance should be set in strict accordance with the line width and line distance calculated by the stack. For example, radio frequency signal (normal 50R control), important single-ended 50R, differential 90R, differential 100R and other signal lines, the specific line width and line spacing can be calculated by stacking (pictured below).

How to set the line width and line spacing in PCB manao

2. The designed line width and line spacing should consider the production process capability of the selected PCB production factory. If the line width and line spacing is set to exceed the process capability of the cooperating PCB manufacturer during the design, unnecessary production costs need to be added, and the The design cannot be produced. Generally, the line width and line spacing are controlled to 6/6mil under normal circumstances, and the via hole is 12mil (0.3mm). Basically, more than 80% of PCB manufacturers can produce it, and the production cost is the lowest. The minimum line width and line spacing is controlled to 4/4mil, and the via hole is 8mil (0.2mm). Basically, more than 70% of PCB manufacturers can produce it, but the price is slightly more expensive than the first case, not too expensive. The minimum line width and line spacing is controlled to 3.5/3.5mil, and the via hole is 8mil (0.2mm). At this time, some PCB manufacturers cannot produce it, and the price will be more expensive. The minimum line width and line spacing is controlled to 2/2mil, and the via hole is 4mil (0.1mm, at this time, it is generally HDI blind buried via design, and laser vias are required). At this time, most PCB manufacturers can’t produce it, and the price is the most expensive of. The line width and line spacing here refer to the size between elements such as line-to-hole, line-to-line, line-to-pad, line-to-via, and hole-to-disk when setting rules.

3. E hoʻonoho i nā lula e noʻonoʻo i ka bottleneck hoʻolālā i ka faila hoʻolālā. Inā loaʻa kahi puʻupuʻu BGA 1mm, he pāpaʻu ka hohonu o ka pine, hoʻokahi wale nō laina hōʻailona e pono ai ma waena o nā lālani ʻelua o nā pine, hiki ke hoʻonohonoho ʻia i 6/6 mil, ʻoi aku ka hohonu o ka hohonu o ka pine, a pono ʻelua lālani o nā pine. Hoʻonohonohoʻia ka laina hōʻailona i 4 / 4mil; aia he 0.65mm BGA chip, i hoʻonohonoho maʻamau i 4/4mil; aia he 0.5mm BGA chip, pono e hoʻonohonoho i ka laulā laina maʻamau a me ka spacing laina i 3.5 / 3.5mil; aia kahi 0.4mm BGA Chips e koi maʻamau i ka hoʻolālā HDI. ʻO ka maʻamau, no ka bottleneck hoʻolālā, hiki iā ʻoe ke hoʻonohonoho i nā lula kūloko (e ʻike i ka hopena o ka ʻatikala [AD software e hoʻonohonoho i ka ROOM, polokalamu ALLEGRO e hoʻonohonoho i nā lula kūloko]), e hoʻonohonoho i ka laulā laina kūloko a me ka spacing laina i kahi kiko liʻiliʻi, a hoʻonohonoho. nā lula no nā ʻāpana ʻē aʻe o ka PCB e ʻoi aku ka nui no ka hana ʻana. E hoʻomaikaʻi i ka helu kūpono o ka PCB i hana ʻia.

4. Pono e hoʻonohonoho ʻia e like me ka nui o ka hoʻolālā PCB. ʻOi aku ka liʻiliʻi a ʻoi aku ka palupalu o ka papa. Hiki ke hoʻonohonoho ʻia ka laulā laina a me ka spacing laina i ʻoi aku ka nui, a ʻo ia hoʻi. Hiki ke hoʻonohonoho ʻia ka hana maʻamau e like me nā pae aʻe:

1) 8 / 8mil, 12mil (0.3mm) no ka puka.

2) 6 / 6mil, 12mil (0.3mm) no ka puka.

3) 4 / 4mil, 8mil (0.2mm) no ka puka.

4) 3.5 / 3.5mil, 8mil (0.2mm) no ka puka.

5) 3.5 / 3.5mil, 4mil ma o ka lua (0.1mm, ʻeliʻeli laser).

6) 2 / 2mil, 4mil ma o ka lua (0.1mm, ʻeliʻeli laser).