1. The signal line that needs to be impedance should be set in strict accordance with the line width and line distance calculated by the stack. For example, radio frequency signal (normal 50R control), important single-ended 50R, differential 90R, differential 100R and other signal lines, the specific line width and line spacing can be calculated by stacking (pictured below).

How to set the line width and line spacing in PCB disinn

2. The designed line width and line spacing should consider the production process capability of the selected PCB production factory. If the line width and line spacing is set to exceed the process capability of the cooperating PCB manufacturer during the design, unnecessary production costs need to be added, and the The design cannot be produced. Generally, the line width and line spacing are controlled to 6/6mil under normal circumstances, and the via hole is 12mil (0.3mm). Basically, more than 80% of PCB manufacturers can produce it, and the production cost is the lowest. The minimum line width and line spacing is controlled to 4/4mil, and the via hole is 8mil (0.2mm). Basically, more than 70% of PCB manufacturers can produce it, but the price is slightly more expensive than the first case, not too expensive. The minimum line width and line spacing is controlled to 3.5/3.5mil, and the via hole is 8mil (0.2mm). At this time, some PCB manufacturers cannot produce it, and the price will be more expensive. The minimum line width and line spacing is controlled to 2/2mil, and the via hole is 4mil (0.1mm, at this time, it is generally HDI blind buried via design, and laser vias are required). At this time, most PCB manufacturers can’t produce it, and the price is the most expensive of. The line width and line spacing here refer to the size between elements such as line-to-hole, line-to-line, line-to-pad, line-to-via, and hole-to-disk when setting rules.

3. Issettja regoli biex tikkunsidra l-konġestjoni tad-disinn fil-fajl tad-disinn. Jekk ikun hemm ċippa BGA ta ‘1mm, il-fond tal-brilli huwa baxx, hija meħtieġa linja tas-sinjal waħda biss bejn iż-żewġ ringieli ta’ labar, li jistgħu jiġu ssettjati għal 6/6 mil, il-fond tal-brilli huwa aktar profond, u huma meħtieġa żewġ ringieli ta ‘brilli Il-linja tas-sinjal hija ssettjata għal 4/4mil; hemm ċippa BGA ta ‘0.65mm, li ġeneralment tkun issettjata għal 4/4mil; hemm ċippa BGA ta ‘0.5mm, il-wisa’ ġenerali tal-linja u l-ispazjar tal-linja għandhom jiġu ssettjati għal 3.5/3.5mil; hemm 0.4mm BGA Chips ġeneralment jeħtieġu disinn HDI. Ġeneralment, għall-konġestjoni tad-disinn, tista ’tissettja regoli reġjonali (ara t-tmiem tal-artikolu [softwer AD biex tissettja kamra, softwer ALLEGRO biex tistabbilixxi regoli reġjonali]), issettja l-wisa’ tal-linja lokali u l-ispazjar tal-linja għal punt żgħir, u ssettja ir-regoli għal partijiet oħra tal-PCB biex ikunu akbar għall-produzzjoni. Ittejjeb ir-rata kwalifikata tal-PCB prodott.

4. Jeħtieġ li jiġi ssettjat skont id-densità tad-disinn tal-PCB. Id-densità hija iżgħar u l-bord huwa aktar laxk. Il-wisa ‘tal-linja u l-ispazjar tal-linja jistgħu jiġu ssettjati biex ikunu akbar, u viċi versa. Ir-rutina tista ‘tiġi ssettjata skond il-passi li ġejjin:

1) 8 / 8mil, 12mil (0.3mm) għal toqba minn ġewwa.

2) 6 / 6mil, 12mil (0.3mm) għal toqba minn ġewwa.

3) 4 / 4mil, 8mil (0.2mm) għal toqba minn ġewwa.

4) 3.5 / 3.5mil, 8mil (0.2mm) għal toqba minn ġewwa.

5) 3.5 / 3.5mil, 4mil għal toqba minn ġewwa (0.1mm, tħaffir bil-lejżer).

6) 2 / 2mil, 4mil għal toqba minn ġewwa (0.1mm, tħaffir bil-lejżer).