1. The signal line that needs to be impedance should be set in strict accordance with the line width and line distance calculated by the stack. For example, radio frequency signal (normal 50R control), important single-ended 50R, differential 90R, differential 100R and other signal lines, the specific line width and line spacing can be calculated by stacking (pictured below).

How to set the line width and line spacing in PCB mamanu

2. The designed line width and line spacing should consider the production process capability of the selected PCB production factory. If the line width and line spacing is set to exceed the process capability of the cooperating PCB manufacturer during the design, unnecessary production costs need to be added, and the The design cannot be produced. Generally, the line width and line spacing are controlled to 6/6mil under normal circumstances, and the via hole is 12mil (0.3mm). Basically, more than 80% of PCB manufacturers can produce it, and the production cost is the lowest. The minimum line width and line spacing is controlled to 4/4mil, and the via hole is 8mil (0.2mm). Basically, more than 70% of PCB manufacturers can produce it, but the price is slightly more expensive than the first case, not too expensive. The minimum line width and line spacing is controlled to 3.5/3.5mil, and the via hole is 8mil (0.2mm). At this time, some PCB manufacturers cannot produce it, and the price will be more expensive. The minimum line width and line spacing is controlled to 2/2mil, and the via hole is 4mil (0.1mm, at this time, it is generally HDI blind buried via design, and laser vias are required). At this time, most PCB manufacturers can’t produce it, and the price is the most expensive of. The line width and line spacing here refer to the size between elements such as line-to-hole, line-to-line, line-to-pad, line-to-via, and hole-to-disk when setting rules.

3. Seti tulafono e iloilo ai le atigipusa mamanu i le faila mamanu. Afai ei ai se va’a 1mm BGA, o le loloto o le pine e papa’u, na’o le tasi le laina faailo e mana’omia i le va o laina e lua o pine, lea e mafai ona seti i le 6/6 mil, o le loloto o le pine e loloto, ma e lua laina o pine e mana’omia. Ole laina faʻailoga ua seti ile 4/4mil; o loʻo i ai se pulou BGA 0.65mm, lea e masani ona seti i le 4 / 4mil; o loʻo i ai se puʻupuʻu 0.5mm BGA, o le laina lautele lautele ma le va o laina e tatau ona seti i le 3.5 / 3.5mil; o loʻo i ai se 0.4mm BGA Chips e masani ona manaʻomia le mamanu HDI. E masani lava, mo le faʻailoga fagu, e mafai ona e setiina tulafono faʻaitulagi (silasila i le pito o le tusiga [AD software to set ROOM, ALLEGRO software to set regional rules]), seti le lautele o laina faʻapitonuʻu ma laina vaʻavaʻa i se mea itiiti, ma seti o tulafono mo isi vaega o le PCB ia tele mo le gaosiga. Faʻaleleia le fua faatatau agavaa o PCB gaosia.

4. E manaʻomia ona faʻatulagaina e tusa ai ma le mamafa o le mamanu PCB. E laʻititi le mafiafia ma e matala le laupapa. O le lautele o le laina ma le va o laina e mafai ona setiina ia sili atu, ma le isi itu. E mafai ona seti le masani e tusa ai ma laasaga nei:

1) 8 / 8mil, 12mil (0.3mm) mo ala pu.

2) 6 / 6mil, 12mil (0.3mm) mo ala pu.

3) 4 / 4mil, 8mil (0.2mm) mo ala pu.

4) 3.5 / 3.5mil, 8mil (0.2mm) mo ala pu.

5) 3.5 / 3.5mil, 4mil mo ala pu (0.1mm, viliina leisa).

6) 2 / 2mil, 4mil mo ala pu (0.1mm, viliina leisa).