Circuit design skills PCB design process

General PCB basic design process is as follows: preliminary preparation – >; PCB structure design -& GT; Cruth PCB – & gt; Sreangachadh – & gt; Optiming Routing agus clò-bhualadh sgrion -> Network and DRC inspections and structural inspections – > Plate making.

First: preparation. This includes preparing component libraries and schematics. “To do good work, must first sharpen its device”, to make a good board, in addition to the principle of good design, but also draw well. Before PCB design, the component library of schematic SCH and the component library of PCB should be prepared first. Peotel libraries can be used, but in general it is difficult to find a suitable library, it is best to make your own library according to the standard size information of the selected device. Ann am prionnsapal, dèan leabharlann co-phàirtean PCB an toiseach, agus an uairsin leabharlann co-phàirtean SCH. Tha riatanasan leabharlann pàirtean PCB àrd, tha e a ’toirt buaidh dhìreach air stàladh a’ bhùird; SCH’s component library requirements are relatively loose, as long as attention is paid to the definition of pin attributes and the corresponding relationship with PCB components. PS: Note the hidden pins in the standard library. An uairsin tha an dealbhadh sgeamaigeach, deiseil airson dealbhadh PCB a dhèanamh.

Dàrna: Dealbhadh structarail PCB. Anns a ’cheum seo, a rèir meud bòrd cuairteachaidh agus suidheachadh meacanaigeach, tha uachdar bùird PCB air a tharraing ann an àrainneachd dealbhaidh PCB, agus tha luchd-ceangail, putanan / suidsichean, tuill sgriubha, tuill cruinneachaidh agus mar sin air an cur a rèir riatanasan suidheachaidh. And fully consider and determine the wiring area and non-wiring area (such as how much of the screw hole around the non-wiring area).

San treas àite: cruth PCB. Layout is basically putting devices on a board. At this point, if all the preparatory work mentioned above is done, the network table can be generated on the schematic diagram (Design- >; CreateNetlist), agus an uairsin cuir a-steach an clàr lìonra air an diagram PCB (design-gt; LoadNets). Faic hubbub inneal a ’chnuic gu lèir suas, eadar na prìnichean agus an loidhne sgiobalta ceangal sgiobalta. Faodaidh tu an uairsin an inneal a chuir a-mach. Tha an dealbhadh coitcheann air a dhèanamh a rèir nam prionnsapalan a leanas:

(1). According to the electrical performance reasonable partition, generally divided into: digital circuit area (that is, afraid of interference, and interference), analog circuit area

(fear of interference), power drive area (interference source);

(2). Complete the same function of the circuit, should be placed as close as possible, and adjust the components to ensure the most simple connection; At the same time, adjust the relative position between the functional blocks to make the connection between the functional blocks the most concise;

(3). Installation position and installation intensity should be considered for components with large mass; Bu chòir an eileamaid teasachaidh a bhith air a sgaradh bhon eileamaid mothachail air teòthachd, agus ma tha sin riatanach, bu chòir beachdachadh air ceumannan convection teirmeach;

(4). I/O drive device as close as possible to the edge of the printing plate, close to the outlet connector;

(5). Clock generator (such as: crystal oscillator or clock oscillator) should be as close as possible to the device using the clock;

6. In each integrated circuit between the power input pin and the ground, need to add a decoupling capacitor (generally using high frequency good monolithic capacitor); Faodar capacitor tantalum a chuir timcheall air grunn chuairtean aonaichte nuair a tha àite a ’bhùird cuairteachaidh teann.

Uachdarain-fearainn. Relay coil to add discharge diode (1N4148 can be);

An-diugh. Layout requirements should be balanced, dense and orderly, not top-heavy or heavy

— Special attention should be paid to the actual size (area and height) of the components and the relative position of the components when placing the components to ensure the electrical performance of the circuit board and the feasibility and convenience of production and installation. At the same time, the above principles should be reflected

Under the premise, modify the placement of devices appropriately to make them neat and beautiful. For example, the same devices should be placed neatly and in the same direction, instead of being “strewn at random”. This step concerns the difficulty of board integral figure and next wiring degree, want to spend big effort to consider so. When layout, can make preliminary wiring first to not quite affirmative place, sufficient consideration.

An ceathramh: wiring. Is e sreangadh am pròiseas as cudromaiche ann an dealbhadh PCB. Bheir seo buaidh dhìreach air coileanadh bòrd PCB. Anns a ’phròiseas de dhealbhadh PCB, mar as trice tha an leithid de thrì ìrean de sgaradh aig wiring: is e a’ chiad fhear an sgaoileadh, an riatanas as bunaitiche ann an dealbhadh PCB. If the line is not cloth, get everywhere is flying line, it will be a unqualified board, can say that there is no entry. The second is the satisfaction of electrical performance. Is e seo an inbhe airson tomhas a bheil bòrd cuairteachaidh clò-bhuailte barantaichte. This is after the distribution, carefully adjust the wiring, so that it can achieve the best electrical performance. An uairsin tha esthetics. Nam biodh an t-aodach uèiridh agad ceangailte, na biodh àite agad cuideachd a tha a ’toirt buaidh air coileanadh innealan dealain, ach seall seachad gu dòigheil, cuir dath dathach, soilleir, a tha a’ tomhas mar a tha coileanadh an inneal dealain agad math, bi fhathast sgudal ann an cuid eile sùil. This brings great inconvenience to testing and maintenance. Bu chòir uèirichean a bhith grinn agus èideadh, gun a bhith crisscross gun riaghailtean. Bu chòir iad sin uile a choileanadh ann an co-theacsa dèanamh cinnteach à coileanadh dealain agus coinneachadh ri riatanasan fa leth eile, air dhòigh eile tha e airson an teisteas a leigeil seachad. Bu chòir uèirichean a dhèanamh a rèir nam prionnsapalan a leanas:

(1). San fharsaingeachd, bu chòir an càball cumhachd agus an càball talmhainn a bhith air an stiùireadh an toiseach gus dèanamh cinnteach à coileanadh dealain a ’bhòrd cuairteachaidh. Anns an raon a tha an suidheachadh sin a ’ceadachadh, leud solar cumhachd a leudachadh, uèir talmhainn cho fad‘ s a ghabhas, tha e nas fheàrr gu bheil uèir talmhainn nas fharsainge na loidhne cumhachd, is e an dàimh aca: uèir talmhainn> loidhne cumhachd> loidhne chomharran, mar as trice is e leud loidhne comharra : 0.2 ~ 0.3mm, faodaidh an leud as taine ruighinn 0.05 ~ 0.07mm, is e an loidhne cumhachd 1.2 ~ 2.5mm san fharsaingeachd. The PCB of a digital circuit can be used in a circuit with wide ground conductors, that is, a ground network. (Analog ground cannot be used in this way.)

(2). In advance, wire strict requirements (such as high frequency line) for wiring, input and output side line should avoid adjacent parallel, so as not to produce reflection interference. When necessary, ground wire should be added to isolate, and the wiring of two adjacent layers should be perpendicular to each other, which is easy to produce parasitic coupling in parallel.

(3). The oscillator housing should be grounded, and the clock line should be as short as possible, and not spread all over the place. Below the clock oscillation circuit, the special high-speed logic circuit should increase the area of the ground, and should not go to other signal lines, so that the surrounding electric field tends to zero;

(4). In order to reduce the radiation of high frequency signal, 45O broken line should be used as far as possible, instead of 90O broken line. (High requirements of the line also use double arc)

(5). Any signal line should not form a loop, if unavoidable, loop should be as small as possible; Bu chòir an loidhne chomharran tron ​​toll a bhith cho beag ‘s a ghabhas;

6. Bu chòir don phrìomh loidhne a bhith goirid agus tiugh, le dìon air gach taobh.

Uachdarain-fearainn. When the sensitive signal and noise field signal are transmitted through flat cable, the method of “ground – signal – ground wire” is used.

An-diugh. Test points should be reserved for key signals to facilitate production and maintenance testing

Pet-name ruby. After schematic diagram wiring is completed, wiring should be optimized; At the same time, after the preliminary network check and DRC check is correct, the ground wire is filled in the area without wiring, and a large area of copper layer is used as ground wire, and the unused places are connected with the ground as ground wire on the printed board. Or make it multi-layer board, power supply, grounding line each occupy a layer.

— PCB wiring process requirements

(1). loidhne

Generally, the signal line width is 0.3mm(12mil), and the power line width is 0.77mm(30mil) or 1.27mm(50mil). Loidhne le

The distance between lines and between lines and pads should be greater than or equal to 0.33mm(13mil). In practical application, it should be considered to increase the distance when conditions permit; When the cabling density is high, it is advisable (but not recommended) to use two cables between IC pins. The width of the cables is 0.254mm(10mil), and the distance between the cables is not less than 0.254mm(10mil).

Under special circumstances, when the pin of the device is dense and the width is narrow, the line width and line spacing can be appropriately reduced.

(2). PAD (PAD)

The basic requirements of PAD and transition hole (VIA) are: the diameter of PAD is greater than 0.6mm than the diameter of hole; For example, universal pin type resistors, capacitors and integrated circuits, using disk/hole size 1.6mm/0.8mm (63mil/32mil), socket, pin and diode 1N4007, using 1.8mm/1.0mm (71mil/39mil). In practical application, it should be determined according to the size of the actual components. If conditions are available, the size of the pad can be appropriately increased. The installation aperture of the components designed on the PCB board should be about 0.2 ~ 0.4mm larger than the actual size of the pins.

(3). Through hole (VIA)

Generally 1.27mm/0.7mm(50mil/28mil);

When the wiring density is high, the hole size can be appropriately reduced, but not too small, can consider 1.0mm/0.6mm(40mil/24mil).

(4). Spacing requirements for pads, wires and through-holes

PADandVIA: ≥0.3mm (12mil)

PADandPAD: ≥0.3mm (12mil)

PADandTRACK: ≥0.3mm (12mil)

TRACKandTRACK: ≥0.3mm (12mil)

Nuair a tha dùmhlachd àrd:

PADandVIA: ≥0.254mm (10mil)

PADandPAD: ≥0.254mm (10mil)

PADandTRACK: ≥0.254mm (10mil)

TRACKandTRACK: ≥0.254mm (10mil)

Còigeamh: optimization wiring agus clò-bhualadh scrion. “Chan eil dad as fheàrr, ach nas fheàrr”! Ge bith dè an oidhirp a chuireas tu a-steach don dealbhadh, nuair a bhios tu deiseil, thoir sùil air a-rithist, agus bidh thu fhathast a ’faireachdainn gun urrainn dhut tòrr atharrachadh. Is e riaghailt dealbhaidh coitcheann gum bi an uèirleadh as fheàrr a ’toirt dà uair cho fada ris an uèirleadh tùsail. Cho luath ‘s a tha thu a’ faireachdainn nach fheum dad a chuir air dòigh, faodaidh tu copar a chuir. PolygonPlane). A ’suidheachadh copar mar as trice a’ breith uèir talmhainn (thoir aire do sgaradh talamh analog agus didseatach), is dòcha gum feum bòrd multilayer cumhachd a chuir sìos cuideachd. Airson clò-bhualadh scrion, bu chòir dhuinn aire a thoirt gun a bhith air a bhacadh leis an inneal no a thoirt air falbh leis an toll agus an pad. Aig an aon àm, dealbhadh gus aghaidh a thoirt air uachdar na co-phàirt, bu chòir giollachd sgàthan a bhith aig bonn an fhacail, gus nach cuir thu dragh air an ìre.

Siathamh: sgrùdadh lìonra agus DRC agus sgrùdadh structar. An toiseach, air a ’bhunait gu bheil an dealbhadh sgeamaigeach ceart, tha na faidhlichean lìonra PCB a chaidh a ghineadh agus faidhlichean lìonra sgeamaichte NETCHECK airson dàimh ceangail corporra, agus tha an dealbhadh air atharrachadh gu sgiobalta a rèir toraidhean an fhaidhle toraidh gus dèanamh cinnteach gu bheil dàimh ceangail uèirleas ceart; Às deidh an sgrùdadh lìonra a dhol seachad gu ceart, thèid sgrùdadh DRC a dhèanamh air dealbhadh PCB, agus thèid an dealbhadh atharrachadh a rèir toraidhean an fhaidhle toraidh ann an ùine gus dèanamh cinnteach à coileanadh dealain uèir PCB. Mu dheireadh, bu chòir tuilleadh sgrùdadh a dhèanamh air structar stàlaidh meacanaigeach PCB.

Seachdamh: dèanamh truinnsear. It is best to have a review process before doing so.

Tha dealbhadh PCB na dheuchainn air inntinn na h-obrach, a tha faisg air an inntinn, eòlas àrd, tha dealbhadh a ’bhùird math. Mar sin bu chòir don dealbhadh a bhith air leth faiceallach, làn bheachdachadh a dhèanamh air feartan gach taobh (leithid cumail suas agus sgrùdadh air seo nach eil mòran dhaoine a ’beachdachadh), sàr-mhathas, comasach air bòrd math a dhealbhadh.