Circuit design skills PCB design process

General PCB basic design process is as follows: preliminary preparation – >; PCB structure design -& GT; Nhazi PCB – & gt; Wiring – & gt; Nhazi okporo ụzọ na ibipụta ihuenyo -> Network and DRC inspections and structural inspections – > Plate making.

First: preparation. This includes preparing component libraries and schematics. “To do good work, must first sharpen its device”, to make a good board, in addition to the principle of good design, but also draw well. Before PCB design, the component library of schematic SCH and the component library of PCB should be prepared first. Peotel libraries can be used, but in general it is difficult to find a suitable library, it is best to make your own library according to the standard size information of the selected device. Na ụkpụrụ, buru ụzọ mee ọbá akwụkwọ akụrụngwa PCB, wee mebe ọba akwụkwọ SCH. Ihe ndị achọrọ n’ọbá akwụkwọ PCB dị elu, ọ na -emetụta nrụnye bọọdụ ozugbo; SCH’s component library requirements are relatively loose, as long as attention is paid to the definition of pin attributes and the corresponding relationship with PCB components. PS: Note the hidden pins in the standard library. Mgbe ahụ bụ atụmatụ atụmatụ, dị njikere ime ime PCB.

Nke abụọ: imebe PCB. N’ime usoro a, dị ka nha okirikiri sekit na nhazi igwe, a na -adọta elu bọọdụ PCB na gburugburu imewe PCB, na njikọta, bọtịnụ/ịgbanye, oghere ịkpụ, oghere mgbakọ na ihe ndị ọzọ ka edobere dị ka ọnọdụ chọrọ. And fully consider and determine the wiring area and non-wiring area (such as how much of the screw hole around the non-wiring area).

Nke atọ: Nhazi PCB. Layout is basically putting devices on a board. At this point, if all the preparatory work mentioned above is done, the network table can be generated on the schematic diagram (Design- >; CreateNetlist), wee bubata tebụl netwọkụ na eserese PCB (design-gt; LoadNets). Hụ hubbub ngwaọrụ nke ikpo ahụ niile, n’etiti njikọ na njikọ njikọ eriri ọkụ ozugbo. Ị nwere ike ịtọpụ ngwaọrụ ahụ. A na -eme nhazi izugbe dịka ụkpụrụ ndị a siri dị:

(1). According to the electrical performance reasonable partition, generally divided into: digital circuit area (that is, afraid of interference, and interference), analog circuit area

(fear of interference), power drive area (interference source);

(2). Complete the same function of the circuit, should be placed as close as possible, and adjust the components to ensure the most simple connection; At the same time, adjust the relative position between the functional blocks to make the connection between the functional blocks the most concise;

(3). Installation position and installation intensity should be considered for components with large mass; Ekwesịrị ikewapụ ihe na -ekpo ọkụ na ihe na -emetụta oke okpomọkụ, ma ọ bụrụ na ọ dị mkpa, ekwesịrị ịtụle usoro nnweta ọkụ;

(4). I/O drive device as close as possible to the edge of the printing plate, close to the outlet connector;

(5). Clock generator (such as: crystal oscillator or clock oscillator) should be as close as possible to the device using the clock;

6. In each integrated circuit between the power input pin and the ground, need to add a decoupling capacitor (generally using high frequency good monolithic capacitor); Enwekwara ike itinye tantalum capacitor gburugburu ọtụtụ sekit agbakwunyere mgbe oghere bọọdụ sekit siri ike.

Ndị nwe ụlọ niile. Relay coil to add discharge diode (1N4148 can be);

Taa. Layout requirements should be balanced, dense and orderly, not top-heavy or heavy

— Special attention should be paid to the actual size (area and height) of the components and the relative position of the components when placing the components to ensure the electrical performance of the circuit board and the feasibility and convenience of production and installation. At the same time, the above principles should be reflected

Under the premise, modify the placement of devices appropriately to make them neat and beautiful. For example, the same devices should be placed neatly and in the same direction, instead of being “strewn at random”. This step concerns the difficulty of board integral figure and next wiring degree, want to spend big effort to consider so. When layout, can make preliminary wiring first to not quite affirmative place, sufficient consideration.

Nke anọ: wiring. Wiring bụ usoro kachasị mkpa na imebe PCB. Nke a ga -emetụta arụmọrụ PCB ozugbo. Na nhazi nke PCB, wiring na -enwekarị ụdị nkewa atọ: nke mbụ bụ nkesa, nke bụ ihe kacha mkpa maka imebe PCB. If the line is not cloth, get everywhere is flying line, it will be a unqualified board, can say that there is no entry. The second is the satisfaction of electrical performance. Nke a bụ ọkọlọtọ iji tụọ ma bọọdụ sekit e biri ebi eruola. This is after the distribution, carefully adjust the wiring, so that it can achieve the best electrical performance. Mgbe ahụ, aesthetics dị. Ọ bụrụ na ejikọrọ akwa wiring gị, enwekwala ebe ihe na -emetụta arụmọrụ ngwa eletriki, mana lee anya n’oge gara aga, gbakwunye agba mara mma, nke na -agbakọ agbakọ, na -agbakọ ka arụmọrụ ngwa eletriki gị si dị mma, ka bụrụ ihe mkpofu n’anya ndị ọzọ. This brings great inconvenience to testing and maintenance. Wiring kwesịrị ịdị mma n’anya na edo edo, ọ bụghị kriscross na -enweghị iwu. Ekwesịrị imezu ihe ndị a niile n’ịhụ na arụmọrụ eletrọnịkị na imezu ihe ndị ọzọ chọrọ, ma ọ bụghị, ọ bụ ịhapụ ihe kacha mkpa. Ekwesịrị ịme wiring dị ka ụkpụrụ ndị a si dị:

(1). N’ozuzu, ekwesịrị ibu ụzọ bute eriri ọkụ na eriri ala iji hụ na ọkụ eletrik nke bọọdụ sekit na -arụ ọrụ. N’ọnọdụ nke ọnọdụ a na -enye ohere, ịgbasa obosara nke ike ọkọnọ, waya ala ruo ka o kwere mee, ọ kacha mma na waya ala sara mbara karịa akara ike, njikọ ha bụ: waya ala> akara ike> akara akara, na -abụkarị akara akara akara : 0.2 ~ 0.3mm, obosara dị gịrịgịrị nwere ike iru 0.05 ~ 0.07mm, ahịrị ike bụ 1.2 ~ 2.5mm n’ozuzu. The PCB of a digital circuit can be used in a circuit with wide ground conductors, that is, a ground network. (Analog ground cannot be used in this way.)

(2). In advance, wire strict requirements (such as high frequency line) for wiring, input and output side line should avoid adjacent parallel, so as not to produce reflection interference. When necessary, ground wire should be added to isolate, and the wiring of two adjacent layers should be perpendicular to each other, which is easy to produce parasitic coupling in parallel.

(3). The oscillator housing should be grounded, and the clock line should be as short as possible, and not spread all over the place. Below the clock oscillation circuit, the special high-speed logic circuit should increase the area of the ground, and should not go to other signal lines, so that the surrounding electric field tends to zero;

(4). In order to reduce the radiation of high frequency signal, 45O broken line should be used as far as possible, instead of 90O broken line. (High requirements of the line also use double arc)

(5). Any signal line should not form a loop, if unavoidable, loop should be as small as possible; Akara akara site na oghere kwesịrị ịdị obere ka o kwere mee;

6. Ahịrị igodo kwesịrị ịdị mkpụmkpụ ma sie ike, yana nchekwa n’akụkụ abụọ ya.

Ndị nwe ụlọ niile. When the sensitive signal and noise field signal are transmitted through flat cable, the method of “ground – signal – ground wire” is used.

Taa. Test points should be reserved for key signals to facilitate production and maintenance testing

Pet-name ruby. After schematic diagram wiring is completed, wiring should be optimized; At the same time, after the preliminary network check and DRC check is correct, the ground wire is filled in the area without wiring, and a large area of copper layer is used as ground wire, and the unused places are connected with the ground as ground wire on the printed board. Ma ọ bụ mee ya bọọdụ nwere ọtụtụ akwa, ọkọnọ ike, ahịrị ala nke ọ bụla nwere akwa.

— PCB wiring process requirements

(1). akara

Generally, the signal line width is 0.3mm(12mil), and the power line width is 0.77mm(30mil) or 1.27mm(50mil). Line with

The distance between lines and between lines and pads should be greater than or equal to 0.33mm(13mil). In practical application, it should be considered to increase the distance when conditions permit; When the cabling density is high, it is advisable (but not recommended) to use two cables between IC pins. The width of the cables is 0.254mm(10mil), and the distance between the cables is not less than 0.254mm(10mil).

Under special circumstances, when the pin of the device is dense and the width is narrow, the line width and line spacing can be appropriately reduced.

(2). PAD (PAD)

The basic requirements of PAD and transition hole (VIA) are: the diameter of PAD is greater than 0.6mm than the diameter of hole; For example, universal pin type resistors, capacitors and integrated circuits, using disk/hole size 1.6mm/0.8mm (63mil/32mil), socket, pin and diode 1N4007, using 1.8mm/1.0mm (71mil/39mil). In practical application, it should be determined according to the size of the actual components. If conditions are available, the size of the pad can be appropriately increased. The installation aperture of the components designed on the PCB board should be about 0.2 ~ 0.4mm larger than the actual size of the pins.

(3). Through hole (VIA)

Generally 1.27mm/0.7mm(50mil/28mil);

When the wiring density is high, the hole size can be appropriately reduced, but not too small, can consider 1.0mm/0.6mm(40mil/24mil).

(4). Spacing requirements for pads, wires and through-holes

PADandVIA: ≥0.3mm (12mil)

PADandPAD: ≥0.3mm (12mil)

PADandTRACK: ≥0.3mm (12mil)

TRACKandTRACK: ≥0.3mm (12mil)

Mgbe njupụta dị elu:

PADandVIA: ≥0.254mm (10mil)

PADandPAD: ≥0.254mm (10mil)

PADandTRACK: ≥0.254mm (10mil)

TRACKandTRACK: ≥0.254mm (10mil)

Nke ise: njikarịcha wiring na mbipụta ihuenyo. “Ọ dịghị ihe kachasị mma, naanị ihe ka mma”! N’agbanyeghị mbọ ole ị na -etinye n’ime imewe ahụ, mgbe ịmechara, lelee ya anya ọzọ, ị ka ga -eche na ị nwere ike ịgbanwe nke ukwuu. Ụkpụrụ imepụta mkpịsị aka n’ozuzu bụ na wiring kacha mma na -ewe ugboro abụọ karịa ogologo wiring mbụ. Ozugbo ị chere na ọ nweghị ihe chọrọ idozi, ị nwere ike dobe ọla kọpa. PolygonPlane). Ịtọba ọla kọpa n’ozuzu na -etinye waya n’ala (leba anya na nkewa nke ala analog na ala dijitalụ), bọọdụ multilayer nwekwara ike ịdị mkpa itinye ike. Maka ibipụta ihuenyo, anyị kwesịrị ị paya ntị ka ngwaọrụ ghara igbochi ma ọ bụ wepu ya na oghere na mpe mpe akwa. N’otu oge ahụ, imewe ihu ihu akụkụ ahụ, ala okwu ahụ kwesịrị ịbụ nhazi enyo, ka ọ ghara ịgbagha ọkwa.

Nke isii: netwọkụ na nyocha DRC na nyocha nhazi. Nke mbu, n’echiche na atụmatụ atụmatụ ahụ ziri ezi, faịlụ netwọkụ PCB ewepụtara na faịlụ netwọkụ atụmatụ bụ NETCHECK maka njikọ njikọ anụ ahụ, a na -emezigharị atụmatụ ya n’oge dabere nsonaazụ nsonaazụ faịlụ iji hụ na izizi nke njikọ njikọ wired; Mgbe agabigachara nlele netwọkụ ahụ n’ụzọ ziri ezi, a ga -eme nyocha DRC na imebe PCB, a ga -emezigharị imewe ahụ dịka nsonaazụ nsonaazụ faịlụ n’oge iji hụ na ọkụ eletrik nke wiwi PCB. N’ikpeazụ, ekwesịrị ịlele ma kwado usoro nrụnye nke PCB.

Nke asaa: ime efere. It is best to have a review process before doing so.

Nhazi PCB bụ nnwale nke uche nke ọrụ, onye dị nso n’uche, ahụmịhe dị elu, imepụta bọọdụ dị mma. Yabụ na imepụta ahụ kwesịrị ịkpachapụ anya nke ọma, tụlee ihe niile nke akụkụ niile (dịka ịkwado mmezi na nyocha nke a ọtụtụ ndị anaghị eche), ịdị mma, ga -enwe ike chepụta bọọdụ dị mma.