Circuit design skills PCB Design Prozess

Allgemeng PCB Basis Designprozess ass wéi follegt: virleefeg Virbereedung ->; PCB structure design -& GT; PCB Layout – & GT; Wiring – & GT; Routing Optimiséierung an Écran Dréckerei -> Network and DRC inspections and structural inspections – > Plate making.

First: preparation. This includes preparing component libraries and schematics. “To do good work, must first sharpen its device”, to make a good board, in addition to the principle of good design, but also draw well. Before PCB design, the component library of schematic SCH and the component library of PCB should be prepared first. Peotel libraries can be used, but in general it is difficult to find a suitable library, it is best to make your own library according to the standard size information of the selected device. In principle, make PCB component library first, and then SCH component library. PCB Komponentbibliothéik Ufuerderunge sinn héich, et beaflosst direkt d’Boardinstallatioun; SCH’s component library requirements are relatively loose, as long as attention is paid to the definition of pin attributes and the corresponding relationship with PCB components. PS: Note the hidden pins in the standard library. Dann ass de schemateschen Design, prett fir PCB Design ze maachen.

Zweet: PCB strukturell Design. An dësem Schrëtt, no der Circuit Board Gréisst a mechanescher Positionéierung, gëtt PCB Board Uewerfläch an der PCB Design Ëmfeld gezeechent, a Stecker, Knäpper/Schalteren, Schrauwen Lächer, Assemblée Lächer a sou weider ginn no Positionéierungsfuerderunge gesat. And fully consider and determine the wiring area and non-wiring area (such as how much of the screw hole around the non-wiring area).

Drëtt: PCB Layout. Layout is basically putting devices on a board. At this point, if all the preparatory work mentioned above is done, the network table can be generated on the schematic diagram (Design- >; CreateNetlist), an importéiert dann den Netzwierkstabell am PCB Diagram (design-gt; LoadNets). Kuckt den Apparat Hubbub vum ganze Stapel, tëscht de Pins a Fluchlinn Promptverbindung. Dir kënnt dann den Apparat leeën. Den allgemenge Layout gëtt no de folgende Prinzipien ausgefouert:

(1). According to the electrical performance reasonable partition, generally divided into: digital circuit area (that is, afraid of interference, and interference), analog circuit area

(fear of interference), power drive area (interference source);

(2). Complete the same function of the circuit, should be placed as close as possible, and adjust the components to ensure the most simple connection; At the same time, adjust the relative position between the functional blocks to make the connection between the functional blocks the most concise;

(3). Installation position and installation intensity should be considered for components with large mass; D’Heizungselement sollt vum Temperatursensitiven Element getrennt sinn, a wann néideg, sollen thermesch Konvektiounsmoossname berécksiichtegt ginn;

(4). I/O drive device as close as possible to the edge of the printing plate, close to the outlet connector;

(5). Clock generator (such as: crystal oscillator or clock oscillator) should be as close as possible to the device using the clock;

6. In each integrated circuit between the power input pin and the ground, need to add a decoupling capacitor (generally using high frequency good monolithic capacitor); En Tantalkondensator kann och ronderëm verschidde integréiert Circuiten gesat ginn wann de Circuit Board Raum enk ass.

All Grondbesëtzer. Relay coil to add discharge diode (1N4148 can be);

Haut. Layout requirements should be balanced, dense and orderly, not top-heavy or heavy

— Special attention should be paid to the actual size (area and height) of the components and the relative position of the components when placing the components to ensure the electrical performance of the circuit board and the feasibility and convenience of production and installation. At the same time, the above principles should be reflected

Under the premise, modify the placement of devices appropriately to make them neat and beautiful. For example, the same devices should be placed neatly and in the same direction, instead of being “strewn at random”. This step concerns the difficulty of board integral figure and next wiring degree, want to spend big effort to consider so. When layout, can make preliminary wiring first to not quite affirmative place, sufficient consideration.

Véiert: Drot. Wiring ass dee wichtegste Prozess am PCB Design. Dëst wäert d’Performance vum PCB Board direkt beaflossen. In the process of PCB design, wiring generally has such three levels of division: the first is the distribution, which is the most basic requirement of PCB design. If the line is not cloth, get everywhere is flying line, it will be a unqualified board, can say that there is no entry. The second is the satisfaction of electrical performance. Dëst ass de Standard fir ze moossen ob e gedréckte Circuit Board qualifizéiert ass. This is after the distribution, carefully adjust the wiring, so that it can achieve the best electrical performance. Da gëtt et Ästhetik. If your wiring cloth was connected, also do not have the place that what affects electric appliance performance, but look past desultorily, add colourful, brightly colored, that calculates how your electric appliance performance is good, still be rubbish in others eye. This brings great inconvenience to testing and maintenance. Kabelen solle propper an eenheetlech sinn, net kräizeg ouni Reegelen. All dëst sollt am Kontext erreecht ginn fir elektresch Leeschtung ze garantéieren an aner individuell Ufuerderunge gerecht ze ginn, soss ass et d’Essenz opzeginn. Kabelen sollen no de folgende Prinzipien ausgefouert ginn:

(1). Am Allgemengen soll de Stroumkabel an de Buedemkabel als éischt rout ginn fir d’elektresch Leeschtung vum Circuit Board ze garantéieren. Am Ëmfang deen dës Konditioun erlaabt, breet Breet vun der Energieversuergung, Buedemdrot sou wäit wéi méiglech, ass et am Beschten datt Buedemdrot méi breet ass wéi Stroumleitung, hir Relatioun ass: Buedemdrot> Stroumleitung> Signallinn, normalerweis Signallinnebreet ass : 0.2 ~ 0.3mm, déi dënnste Breet kann 0.05 ~ 0.07mm erreechen, Stroumleitung ass 1.2 ~ 2.5mm allgemeng. De PCB vun engem digitale Circuit kann an engem Circuit mat breede Buedemleitungen benotzt ginn, dat heescht e Buedemnetz. (Analog Terrain kann net op dës Manéier benotzt ginn.)

(2). In advance, wire strict requirements (such as high frequency line) for wiring, input and output side line should avoid adjacent parallel, so as not to produce reflection interference. When necessary, ground wire should be added to isolate, and the wiring of two adjacent layers should be perpendicular to each other, which is easy to produce parasitic coupling in parallel.

(3). The oscillator housing should be grounded, and the clock line should be as short as possible, and not spread all over the place. Below the clock oscillation circuit, the special high-speed logic circuit should increase the area of the ground, and should not go to other signal lines, so that the surrounding electric field tends to zero;

(4). In order to reduce the radiation of high frequency signal, 45O broken line should be used as far as possible, instead of 90O broken line. (High requirements of the line also use double arc)

(5). Any signal line should not form a loop, if unavoidable, loop should be as small as possible; Signallinn duerch d’Lach sollt sou wéineg wéi méiglech sinn;

6. D’Schlëssellinn sollt kuerz an déck sinn, mat Schutz op béide Säiten.

All Grondbesëtzer. When the sensitive signal and noise field signal are transmitted through flat cable, the method of “ground – signal – ground wire” is used.

Haut. Test points should be reserved for key signals to facilitate production and maintenance testing

Pet-name ruby. After schematic diagram wiring is completed, wiring should be optimized; At the same time, after the preliminary network check and DRC check is correct, the ground wire is filled in the area without wiring, and a large area of copper layer is used as ground wire, and the unused places are connected with the ground as ground wire on the printed board. Or make it multi-layer board, power supply, grounding line each occupy a layer.

— PCB wiring process requirements

(1). Linn

Generally, the signal line width is 0.3mm(12mil), and the power line width is 0.77mm(30mil) or 1.27mm(50mil). Linn mat

The distance between lines and between lines and pads should be greater than or equal to 0.33mm(13mil). In practical application, it should be considered to increase the distance when conditions permit; When the cabling density is high, it is advisable (but not recommended) to use two cables between IC pins. The width of the cables is 0.254mm(10mil), and the distance between the cables is not less than 0.254mm(10mil).

Under special circumstances, when the pin of the device is dense and the width is narrow, the line width and line spacing can be appropriately reduced.

(2). PAD (PAD)

The basic requirements of PAD and transition hole (VIA) are: the diameter of PAD is greater than 0.6mm than the diameter of hole; For example, universal pin type resistors, capacitors and integrated circuits, using disk/hole size 1.6mm/0.8mm (63mil/32mil), socket, pin and diode 1N4007, using 1.8mm/1.0mm (71mil/39mil). In practical application, it should be determined according to the size of the actual components. If conditions are available, the size of the pad can be appropriately increased. The installation aperture of the components designed on the PCB board should be about 0.2 ~ 0.4mm larger than the actual size of the pins.

(3). Through hole (VIA)

Generally 1.27mm/0.7mm(50mil/28mil);

When the wiring density is high, the hole size can be appropriately reduced, but not too small, can consider 1.0mm/0.6mm(40mil/24mil).

(4). Spacing requirements for pads, wires and through-holes

PADandVIA: ≥0.3mm (12mil)

PADandPAD: ≥0.3mm (12mil)

PADandTRACK: ≥0.3mm (12mil)

TRACKandTRACK: ≥0.3mm (12mil)

Wann d’Dicht héich ass:

PADandVIA: ≥0.254mm (10mil)

PADandPAD: ≥0.254mm (10mil)

PADandTRACK: ≥0.254mm (10mil)

TRACKandTRACK: ≥0.254mm (10mil)

Fënneft: Drotoptimiséierung an Écran Dréckerei. “There is no best, only better”! Egal wéi vill Effort Dir an den Design gesat hutt, wann Dir fäerdeg sidd, kuckt et nach eng Kéier, an Dir fillt Iech ëmmer datt Dir vill ännere kënnt. Eng allgemeng Design Daumereegel ass datt optimal Drot duebel sou laang dauert wéi déi initial Kabelen. Wann Dir Iech fillt datt näischt brauch ze fixéieren, kënnt Dir Kupfer placéieren. PolygonPlane). Kupfer leeën allgemeng Buedemdrot leeën (oppassen op d’Trennung vum analoge an digitale Buedem), Multilayer Board kann och d’Kraaft musse leeën. For screen printing, we should pay attention to not be blocked by the device or removed by the hole and pad. Zur selwechter Zäit, Design fir d’Komponent Uewerfläch ze stellen, de Buedem vum Wuert sollt Spigelveraarbechtung sinn, sou datt den Niveau net duerchernee geet.

Sechstens: Netzwierk an DRC Kontroll a Strukturcheck. Als éischt, op der Viraussetzung datt de schemateschen Design richteg ass, sinn déi generéiert PCB Netzdateien a schematesch Netzwierksdateien NETCHECK fir kierperlech Verbindungsrelatioun, an den Design gëtt rechtzäiteg geännert no den Output Dateiresultater fir d’Korrektheet vun der Drotverbindungsverhältnis ze garantéieren; Nodeems d’Netzkontroll richteg passéiert ass, gëtt DRC Kontroll um PCB Design duerchgefouert, an den Design gëtt geännert no den Ausgangsdateieresultater an der Zäit fir d’elektresch Leeschtung vun PCB Drot ze garantéieren. Endlech soll d’mechanesch Installatiounsstruktur vum PCB weider gepréift a bestätegt ginn.

Siwenten: Platen maachen. It is best to have a review process before doing so.

PCB Design ass en Test vum Geescht vun der Aarbecht, deen no beim Geescht ass, héich Erfahrung, den Design vum Board ass gutt. Also den Design sollt extrem virsiichteg sinn, voll d’Faktore vun allen Aspekter berécksiichtegen (sou wéi den Ënnerhalt an d’Inspektioun vun dësem vill Leit erliichteren net vill), Exzellenz, wäert fäeg sinn e gudde Board ze designen.