Tha grunn chùisean tagraidh de thoraidhean tricead gnìomhachais, saidheansail agus meidigeach (ISM-RF) a ’sealltainn gu bheil an bòrd cuairteachaidh clò-bhuailte tha cruth nan toraidhean sin buailteach do dhiofar lochdan.Bidh daoine gu tric a ’faighinn a-mach gum bi an aon IC air a chuir a-steach air dà bhòrd cuairteachaidh eadar-dhealaichte, bidh comharran coileanaidh gu math eadar-dhealaichte. Variations in operating conditions, harmonic radiation, anti-interference ability, and start-up time can explain the importance of circuit board layout in a successful design.

This article lists the various design omissions, discusses the causes of each failure, and provides suggestions on how to avoid these design defects. Anns a ’phàipear seo, fr-4 dielectric, tiugh 0.0625in tiugh PCB còmhdach dùbailte mar eisimpleir, am bòrd cuairteachaidh a’ tighinn gu làr. Operating in different frequency bands between 315MHz and 915MHz, Tx and Rx power between -120dbm and +13dBm.

Stiùireadh inntrigidh

Nuair a bhios dà inductor (no eadhon dà loidhne PCB) faisg air a chèile, bidh inductance a chèile a ’tachairt. The magnetic field generated by the current in the first circuit excites the current in the second circuit (Figure 1). This process is similar to the interaction between the primary and secondary coils of a transformer. When two currents interact through a magnetic field, the voltage generated is determined by mutual inductance LM:

Far a bheil, is e YB an bholtadh mearachd a chaidh a thoirt a-steach do chuairt B, is e IA an 1 gnàthach ag obair air cuairt A. Tha LM gu math mothachail air farsaingeachd cuairteachaidh, àite lùb inductance (ie, flux magnetach), agus stiùireadh lùb. Therefore, the best balance between compact circuit layout and reduced coupling is the correct alignment of all inductors in the direction.

FIG. 1. It can be seen from magnetic field lines that mutual inductance is related to inductance alignment direction

The direction of circuit B is adjusted so that its current loop is parallel to the magnetic field line of circuit A. Airson an adhbhair seo, cho ceart ‘s a ghabhas ri chèile, thoir sùil air cruth cuairteachaidh bòrd Measaidh Glacadair superheterodyne FSK le cumhachd ìosal (MAX7042EVKIT) (Figear 2). The three inductors on the board (L3, L1 and L2) are very close to each other, and their orientation at 0°, 45° and 90° helps to reduce mutual inductance.

Figear 2. Tha dà chruth PCB eadar-dhealaichte air an sealltainn, aon dhiubh le na h-eileamaidean air an rèiteachadh anns an rathad ceàrr (L1 agus L3), agus am fear eile nas freagarraiche.

Gu h-iomlan, bu chòir na prionnsapalan a leanas a leantainn:

Bu chòir an farsaingeachd inductance a bhith cho fada ‘sa ghabhas.

Tha luchd-inntrigidh air an rèiteachadh aig ceart-cheàrnan gus crosstalk eadar inductors a lughdachadh.

Stiùir an ceangal

Dìreach mar a tha treòrachadh inductors a ’toirt buaidh air ceangal magnetach, mar sin tha an ceangal ma tha na luaidhe ro fhaisg air a chèile. Bidh an seòrsa duilgheadas cruth seo cuideachd a ’toirt a-mach rud ris an canar mothachadh dha chèile. Is e aon de na duilgheadasan as draghail a th ’ann an cuairteachadh RF sreangadh pàirtean mothachail den t-siostam, leithid an lìonra maidsidh inntrigidh, sianal athshondach a’ ghlacadair, lìonra maidsidh antenna an t-sgaoilidh, msaa.

Bu chòir an t-slighe gnàthach tilleadh a bhith cho faisg air a ’phrìomh shlighe gnàthach’ s as urrainn gus an raon magnetach rèididheachd a lughdachadh. This arrangement helps to reduce the current loop area. Mar as trice is e an t-slighe dìon ìosal as fheàrr airson an t-sruth tilleadh an roinn talmhainn fon luaidhe – gu h-èifeachdach a ’cuingealachadh na sgìre lùb gu sgìre far a bheil tiugh an dielectric air iomadachadh le fad an luaidhe. Ach, ma tha roinn na talmhainn air a sgaradh, bidh an raon lùb ag àrdachadh (Figear 3). For leads passing through the split region, the return current will be forced through the high resistance path, greatly increasing the current loop area. This arrangement also makes circuit leads more susceptible to mutual inductance.

Figear 3. Cuidichidh bunait farsaingeachd mhòr le bhith a ’leasachadh coileanadh an t-siostaim

Airson fìor inductor, tha buaidh mhòr aig stiùireadh luaidhe cuideachd air ceangal achadh magnetach. Ma dh ’fheumas stiùirichean cuairt mothachail a bhith faisg air a chèile, tha e nas fheàrr na stiùirichean a cho-thaobhadh gu dìreach gus lughdachadh a lughdachadh (Figear 4). If vertical alignment is not possible, consider using a guard line. Airson dealbhadh uèir dìon, thoir sùil air an roinn làimhseachaidh stèidhichte agus lìonadh gu h-ìosal.

Figure 4. Similar to Figure 1, shows the possible coupling of magnetic field lines.

To sum up, the following principles should be followed when the plate is distributed:

Complete grounding should be ensured below the lead.

Sensitive leads should be arranged vertically.

If the leads must be arranged in parallel, ensure adequate spacing or use guard wires.

Grounding via

Mar as trice is e am prìomh dhuilgheadas le cruth cuairt RF an impedance caractar suboptimal den chuairt, a ’toirt a-steach na pàirtean cuairteachaidh agus na h-eadar-cheanglaichean aca. Tha an luaidhe le còmhdach copair tana co-ionann ris an uèir inductance agus a ’cruthachadh comas sgaoilte le luaidhe eile faisg air làimh. Bidh an luaidhe cuideachd a ’taisbeanadh feartan inductance agus capacitance mar a bhios e a’ dol tron ​​toll.

The through-hole capacitance mainly comes from the capacitance formed between the copper cladding on the side of the through-hole pad and the copper cladding on the ground, separated by a fairly small ring. Another influence comes from the cylinder of the metal perforation itself. Tha buaidh comasachd dìosganach mar as trice beag agus mar as trice chan eil e ag adhbhrachadh ach atharrachadh iomaill ann an comharran didseatach aig astar àrd (nach eilear a ’bruidhinn sa phàipear seo).

Is e a ’bhuaidh as motha a th’ aig an toll troimhe an inductance parasitic air adhbhrachadh leis a ’mhodh eadar-cheangail co-fhreagarrach. Because most metal perforations in RF PCB designs are the same size as lumped components, the effect of electrical perforations can be estimated using a simple formula (FIG. 5) :

Where, LVIA is lumped inductance through hole; H is the height of the throughhole, in inches; Is e D trast-thomhas an toll troimhe, ann an òirlich 2.

Mar a sheachnadh diofar lochdan ann an cruth PCB de bhùird clò-bhuailte

FIG. 5. PCB cross section used to estimate parasitic effects on through-hole structures

The parasitic inductance often has a great influence on the connection of bypass capacitors. Bidh innealan seach-rathad iomchaidh a ’toirt seachad cuairtean goirid àrd-tricead eadar an sòn solarachaidh agus an cruthachadh, ach faodaidh tuill troimhe nach eil air leth buaidh a thoirt air an t-slighe cugallachd ìosal eadar an cruthachadh agus an sòn solarachaidh. A typical PCB through hole (d = 10 mil, h = 62.5 mil) is approximately equivalent to a 1.34nH inductor. Leis cho tric sa tha an toradh ISM-RF, faodaidh na tro-thuill droch bhuaidh a thoirt air cuairtean mothachail leithid cuairtean seanail athshondach, sìoltachain agus lìonraidhean maidsidh.

Bidh duilgheadasan eile ag èirigh ma bhios cuairtean mothachail a ’roinn tuill, leithid an dà ghàirdean de lìonra seòrsa π. Mar eisimpleir, le bhith a ’cur toll air leth freagarrach co-ionann ri inductance cnapach, tha an sgeama co-ionnan gu math eadar-dhealaichte bhon dealbhadh cuairteachaidh tùsail (FIG. 6). As with crosstalk of common current path 3, resulting in increased mutual inductance, increased crosstalk and feed-through.

How to avoid PCB design problems

Figear 6. Ailtirean fìor mhath vs neo-iomchaidh, tha “slighean comharran” a dh ’fhaodadh a bhith anns a’ chuairt.

To sum up, circuit layout should follow the following principles:

Ensure modeling of through-hole inductance in sensitive areas.

The filter or matching network uses independent through-holes.

Note that a thinner PCB copper-clad will reduce the effect of parasitic inductance through the hole.

Faid na luaidhe

Bidh dàta toraidh Maxim ISM-RF gu tric a ’moladh a bhith a’ cleachdadh an cur-a-steach agus toradh àrd-tricead as giorra a tha comasach gus call agus rèididheachd a lughdachadh. Air an làimh eile, tha an leithid de chall mar as trice air adhbhrachadh le paramadairean faoighiche neo-iomchaidh, agus mar sin bidh an dà chuid inductance parasit agus comas a ’toirt buaidh air cruth a’ chuairt, agus le bhith a ’cleachdadh an luaidhe as giorra a tha comasach a’ cuideachadh le bhith a ’lughdachadh nam paramadairean faoighiche. Typically, a 10 mil wide PCB lead with a distance of 0.0625in… From a FR4 board produces an inductance of approximately 19nH/in and a distributed capacitance of approximately 1pF/in. Airson cuairt LAN / measgachaidh le inductor 20nH agus capacitor 3pF, bidh buaidh mhòr air luach co-phàirteach èifeachdach nuair a tha an cuairteachadh agus cruth a ’cho-phàirt gu math toinnte.

Ipc-d-317a4 in ‘Institute for Printed Circuits’ provides an industry standard equation for estimating various impedance parameters of microstrip PCB. Chaidh an sgrìobhainn seo a chuir an àite ann an 2003 le IPC-2251 5, a tha a ’toirt seachad dòigh àireamhachaidh nas cruinne airson diofar stiùirichean PCB. Online calculators are available from a variety of sources, most of which are based on equations provided by IPC-2251. The Electromagnetic Compatibility Lab at Missouri Institute of Technology provides a very practical method for calculating PCB lead impedance 6.

The accepted criteria for calculating the impedance of microstrip lines are:

Anns an fhoirmle, is e εr seasmhach dielectric an dielectric, is e h àirde na luaidhe bhon stratum, is e W an leud luaidhe, agus is e T an tighead luaidhe (FIG. 7). Nuair a tha w / h eadar 0.1 agus 2.0 agus εr eadar 1 agus 15, tha toraidhean àireamhachaidh na foirmle seo gu math ceart.

Figure 7. This figure is a PCB cross section (similar to Figure 5) and represents the structure used to calculate the impedance of a microstrip line.

In order to evaluate the effect of lead length, it is more practical to determine the detuning effect of ideal circuit by lead parasitical parameters. San eisimpleir seo, bruidhnidh sinn air comas strae agus inductance. The standard equation of characteristic capacitance for microstrip lines is:

San aon dòigh, faodar an inductance caractar a thomhas bhon cho-aontar le bhith a ’cleachdadh na co-aontar gu h-àrd:

Mar eisimpleir, gabh ri tiugh PCB de 0.0625in. (h = 62.5 mil), 1 unnsa luaidhe còmhdaichte le copar (t = 1.35 mil), 0.01in. (w = 10 mil), agus bòrd FR-4. Thoir fa-near gu bheil an ε R de FR-4 mar as trice 4.35 farad / m (F / m), ach faodaidh e a bhith bho 4.0F / m gu 4.7F / m. Is e na eigenvalues ​​a chaidh a thomhas san eisimpleir seo Z0 = 134 ω, C0 = 1.04pF / in, L0 = 18.7nH / in.

Airson dealbhadh AN ISM-RF, faodaidh cruth 12.7mm (0.5in) de luaidhe air a ’bhòrd paramadairean faoighteach timcheall air 0.5pF agus 9.3nH (Figear 8) a thoirt gu buil. Dh ’fhaodadh buaidh paramadairean faoighiche aig an ìre seo air sianal athshondach a’ ghlacadair (atharrachadh toradh LC) leantainn gu eadar-dhealachadh 315MHz ± 2% no 433.92mhz ± 3.5%. Mar thoradh air a ’chomas agus an inductance a bharrachd a tha air adhbhrachadh le buaidh dìosganach na luaidhe, ruigidh stùc tricead oscillation 315MHz 312.17mhz, agus ruigidh stùc tricead oscillation 433.92mhz 426.6mhz.

Another example is the resonant channel of Maxim’s superheterodyne receiver (MAX7042). The recommended components are 1.2pF and 30nH at 315MHz; At 433.92MHz, it is 0pF and 16nH. Obraich a-mach tricead oscillation cuairt cuairteachaidh le bhith a ’cleachdadh an co-aontar:

Bu chòir don mheasadh air cuairteachadh athshondach a ’phlàta a bhith a’ toirt a-steach buaidhean dìosganach a ’phacaid agus an cruth, agus tha na paramadairean faoighiche aig 7.3PF agus 7.5PF fa leth nuair a thathar a’ tomhas tricead athshondach 315MHz. Thoir fa-near gu bheil toradh LC a ’riochdachadh comas cnapach.

Gu h-iomlan, feumar na prionnsapalan a leanas a leantainn:

Cùm an stiùir cho goirid ‘s a ghabhas.

Cuir prìomh chuairtean cho faisg air an inneal sa ghabhas.

Tha prìomh phàirtean air an dìoladh a rèir parasitism an fhìor chruth.

Làimhseachadh talmhainn agus lìonadh

The grounding or power layer defines a common reference voltage that supplies power to all parts of the system through a low resistance path. Tha a bhith a ’co-ionnanachadh gach raon dealain san dòigh seo a’ toirt a-mach deagh inneal dìon.

Bidh sruth dhìreach an-còmhnaidh buailteach a bhith a ’sruthadh air slighe dìon ìosal. San aon dòigh, bidh sruth àrd-tricead a ’sruthadh tron ​​t-slighe leis an t-strì as ìsle. So, for a standard PCB microstrip line above the formation, the return current tries to flow into the ground region directly below the lead. As described in the lead coupling section above, the cut ground area introduces various noises that increase crosstalk either through magnetic field coupling or by converging currents (Figure 9).

Mar a sheachnadh diofar lochdan ann an cruth PCB de bhùird clò-bhuailte

FIG. 9. Keep the formation intact as much as possible, otherwise the return current will cause crosstalk.

Filled ground, also known as guard lines, is commonly used in circuits where continuous grounding is difficult to lay or where shielding sensitive circuits is required (FIG. 10). The shielding effect can be increased by placing grounding holes (i.e. hole arrays) at both ends of the lead or along the lead. 8. Na bi a ’measgachadh an uèir dìon leis an luaidhe a chaidh a dhealbhadh gus slighe gnàthach tilleadh a thoirt seachad. Faodaidh an rèiteachadh seo crosstalk a thoirt a-steach.

Mar a sheachnadh diofar lochdan ann an cruth PCB de bhùird clò-bhuailte

FIG. 10. Bu chòir do dhealbhadh an t-siostam RF uèirichean còmhdaich copair a sheachnadh, gu sònraichte ma tha feum air rùsgadh copair.

Chan eil an sgìre còmhdaichte le copar air a ghrunnd (air bhog) no air a ghrunnd aig aon cheann, a tha a ’cuingealachadh èifeachdas. In some cases, it can cause unwanted effects by forming parasitic capacitance that changes the impedance of the surrounding wiring or creates a “latent” path between circuits. Ann an ùine ghoirid, ma thèid pìos de chòmhdach copair (sreangadh comharran neo-chuairteach) a chuir air a ’bhòrd cuairteachaidh gus dèanamh cinnteach gu bheil tiugh plating cunbhalach. Bu chòir raointean còmhdaichte le copar a sheachnadh oir tha iad a ’toirt buaidh air dealbhadh a’ chuairteachaidh.

Mu dheireadh, bi cinnteach gum beachdaich thu air buaidh raon talmhainn sam bith faisg air an antenna. Bidh roinn talmhainn, uèirleadh agus tuill aig antenna monopole sam bith mar phàirt de chothromachadh an t-siostaim, agus bidh uèirleadh cothromachaidh neo-iomchaidh a ’toirt buaidh air èifeachdas rèididheachd agus stiùireadh an antenna (teamplaid rèididheachd). Therefore, the ground area should not be placed directly below the monopole PCB lead antenna.

Gu h-iomlan, bu chòir na prionnsapalan a leanas a leantainn:

Thoir seachad sònaichean talmhainn leantainneach agus le neart ìseal cho fad ‘sa ghabhas.

Tha gach ceann den loidhne lìonaidh stèidhichte, agus tha sreath tro tholl air a chleachdadh cho fad ‘s a ghabhas.

Na cuir air bhog uèir còmhdaichte copar faisg air cuairt RF, na cuir copar timcheall air cuairt RF.

Ma tha grunn shreathan anns a ’bhòrd cuairteachaidh, tha e nas fheàrr talamh a chuir tro tholl nuair a thèid an càball comharra bho aon taobh chun taobh eile.

Comas criostail anabarrach

Parasitic capacitance will cause the crystal frequency to deviate from the target value 9. Mar sin, bu chòir cuid de stiùiridhean coitcheann a leantainn gus comas strae prìneachan criostail, padaichean, uèirichean, no ceanglaichean ri innealan RF a lughdachadh.

Bu chòir na prionnsapalan a leanas a leantainn:

Bu chòir an ceangal eadar an inneal criostail agus RF a bhith cho goirid ‘s a ghabhas.

Cùm an uèirleadh bho chèile cho fada ‘s a ghabhas.

Ma tha an comas dìosganach shunt ro mhòr, thoir air falbh an roinn fon talamh fon chriostal.

Inductance wiring planar

Planar wiring or PCB spiral inductors are not recommended. Typical PCB manufacturing processes have certain inaccuracies, such as width and space tolerances, which greatly affect the accuracy of component values. Mar sin, tha a ’mhòr-chuid de luchd-brosnachaidh fo smachd agus àrd Q nan seòrsa leòn. San dàrna àite, faodaidh tu inductor ceramic multilayer a thaghadh, bidh luchd-saothrachaidh capacitor chip multilayer cuideachd a ’toirt seachad an toradh seo. Ach a dh ’aindeoin sin, tha cuid de dhealbhadairean a’ taghadh inductors snìomhach nuair a dh ’fheumas iad. The standard formula for calculating planar spiral inductance is usually Wheeler’s formula 10:

Càite, is e radius cuibheasach a ’choilich, ann an òirlich; Is e N an àireamh oidhirpean; Is e C leud cridhe a ’choil (router-rinner), ann an òirlich. Nuair a tha an coil c “0.2a 11, tha cruinneas an dòigh àireamhachaidh taobh a-staigh 5%.

Faodar inductors snìomhach aon-fhillte de chumaidhean ceàrnagach, sia-thaobhach no cumaidhean eile a chleachdadh. Gheibhear tuairmsean fìor mhath gus modal a dhèanamh air inductance planar air wafers cuairt aonaichte. Gus an amas seo a choileanadh, tha am foirmle Wheeler àbhaisteach air atharrachadh gus dòigh tuairmseach inductance plèana fhaighinn a tha freagarrach airson meud beag agus meud ceàrnagach 12.

Càite, ρ an co-mheas lìonadh :; Is e N an àireamh oidhirpean, agus is e dAVG an trast-thomhas cuibheasach :. Airson helices ceàrnagach, K1 = 2.36, K2 = 2.75.

Tha mòran adhbharan ann airson a bhith a ’seachnadh a bhith a’ cleachdadh an seòrsa inductor seo, a bhios mar as trice a ’leantainn gu luachan lùghdachaidh nas lugha air sgàth cuingealachadh àite. The main reasons for avoiding planar inductors are limited geometry and poor control of critical dimensions, which makes it impossible to predict inductor values. A bharrachd air an sin, tha e doirbh smachd a chumail air fìor luachan inductance rè cinneasachadh PCB, agus tha inductance cuideachd buailteach fuaim a chàradh gu pàirtean eile den chuairt.