Liketsahalo tse ngata tsa ts’ebeliso ea lihlahisoa tsa maqhubu a radio, tsa mahlale le tsa bongaka (ISM-RF) li bonts’a hore boto ea potoloho e hatisitsoeng moralo oa lihlahisoa tsena o tloaetse ho ba le liphoso tse fapaneng.Hangata batho ba fumana hore IC e ts’oanang e kentsoe libotong tse peli tse fapaneng tsa potoloho, litsupa tsa ts’ebetso li tla fapana haholo. Variations in operating conditions, harmonic radiation, anti-interference ability, and start-up time can explain the importance of circuit board layout in a successful design.

This article lists the various design omissions, discusses the causes of each failure, and provides suggestions on how to avoid these design defects. Ka pampiri ena, fr-4 dielectric, 0.0625in botenya habeli lera PCB e le mohlala, oa potoloho boto fatše. Operating in different frequency bands between 315MHz and 915MHz, Tx and Rx power between -120dbm and +13dBm.

Inductance tataiso

Ha inductors tse peli (kapa esita le mela e ‘meli PCB) ba haufi le e mong le e tse ling tse, inductance bobeli tla etsahala. The magnetic field generated by the current in the first circuit excites the current in the second circuit (Figure 1). This process is similar to the interaction between the primary and secondary coils of a transformer. When two currents interact through a magnetic field, the voltage generated is determined by mutual inductance LM:

Moo, YB ke motlakase o nang le phoso o kenngoeng potolohong B, IA ke 1 ea morao-rao ea setereke sa A. LM is very sensitive to circuit spacing, inductance loop area (i.e., magnetic flux), and loop direction. Therefore, the best balance between compact circuit layout and reduced coupling is the correct alignment of all inductors in the direction.

FIG. 1. It can be seen from magnetic field lines that mutual inductance is related to inductance alignment direction

The direction of circuit B is adjusted so that its current loop is parallel to the magnetic field line of circuit A. Bakeng sa morero ona, ka hohle kamoo ho ka khonehang ho e mong, ka kopo sheba sebopeho sa potoloho ea boto ea FSK superheterodyne Receiver Evaluation (EV) ea matla a tlase (MAX7042EVKIT) (Setšoantšo sa 2). The three inductors on the board (L3, L1 and L2) are very close to each other, and their orientation at 0°, 45° and 90° helps to reduce mutual inductance.

Setšoantšo sa 2. Meetso e ‘meli e fapaneng ea PCB e bonts’itsoe, e’ ngoe ea tsona e na le likarolo tse hlophisitsoeng ka tsela e fosahetseng (L1 le L3), ha e ‘ngoe e loketse.

To sum up, the following principles should be followed:

Likarolo tsa inductance li lokela ho ba hohle kamoo ho ka khonehang.

Li-inductor li hlophisitsoe ka mahlakore a nepahetseng ho fokotsa crosstalk lipakeng tsa inductors.

Etella pele ho kopanya

Joalo ka ha boits’oaro ba li-inductors bo ama ho kopanya matla a khoheli, ho joalo le ka ho hokahanya haeba litselana li le haufi haholo. Mofuta ona oa bothata ba sebopeho o hlahisa se bitsoang ho utloana. E ‘ngoe ea mathata a amehang ka ho fetesisa a potoloho ea RF ke ho ts’oara likhoele tsa likarolo tse hlokolosi tsa sistimi joalo ka marang-rang a kenyelletsoang, mocha oa resonant oa seamohedi, marang-rang a tsamaisang manakana, jj.

Tsela ea morao-rao ea ho khutla e lokela ho ba haufi le tsela e kholo ea hajoale kamoo ho ka khonehang ho fokotsa matla a khoheli a radiation. This arrangement helps to reduce the current loop area. Mokhoa o motle oa ho hanyetsa bakeng sa hajoale o khutla hangata ke sebaka sa lefats’e se ka tlase ho lead – se lekanyetsa hantle sebaka sa lupu sebakeng seo ho sona botenya ba dielectric bo atisoang ke bolelele ba lead. Leha ho le joalo, haeba sebaka sa lefats’e se arotsoe, sebaka sa lupu sea eketseha (Setšoantšo sa 3). For leads passing through the split region, the return current will be forced through the high resistance path, greatly increasing the current loop area. This arrangement also makes circuit leads more susceptible to mutual inductance.

Setšoantšo sa 3. Sebaka se seholo sa tikoloho se thusa ho ntlafatsa ts’ebetso ea sistimi

Bakeng sa inductor ea ‘nete, tataiso ea lead e boetse e na le tšusumetso e kholo ho kopaneng ha matla a khoheli. Haeba litsamaiso tsa potoloho e hlokolosi li tlameha ho ba haufi, ho molemo ho hokahanya litselana ka ho otloloha ho fokotsa ho kopanya (Setšoantšo sa 4). If vertical alignment is not possible, consider using a guard line. For protection wire design, please refer to the grounding and filling treatment section below.

Figure 4. Similar to Figure 1, shows the possible coupling of magnetic field lines.

To sum up, the following principles should be followed when the plate is distributed:

Complete grounding should be ensured below the lead.

Sensitive leads should be arranged vertically.

If the leads must be arranged in parallel, ensure adequate spacing or use guard wires.

Grounding via

Bothata bo boholo ka peakanyo ea potoloho ea RF hangata ke khaolo e ka tlase ea potoloho, ho kenyeletsoa likarolo tsa potoloho le likhokahano tsa tsona. Moeta-pele o koahelang koporo e tšesaane o lekana le terata ea inductance mme o theha matla a abuoang le lits’oants’o tse ling tikolohong eo. Moetapele o boetse o bonts’a litšobotsi tsa ho se sebetse hantle ha o feta ka sekoting.

The through-hole capacitance mainly comes from the capacitance formed between the copper cladding on the side of the through-hole pad and the copper cladding on the ground, separated by a fairly small ring. Another influence comes from the cylinder of the metal perforation itself. Kameho ea matla a likokoana-hloko hangata e nyane mme hangata e baka feela phapang ea bohale ho matšoao a dijithale a phahameng haholo (a sa buuoang pampiring ena).

Phello e kholo ka ho fetisisa ea sekoti ke ho kenella ha likokoana-hloko ho bakoang ke mokhoa o lumellanang oa khokahanyo. Because most metal perforations in RF PCB designs are the same size as lumped components, the effect of electrical perforations can be estimated using a simple formula (FIG. 5) :

Where, LVIA is lumped inductance through hole; H is the height of the throughhole, in inches; D ke bophara ba lesoba, ka lisenthimithara tsa 2.

Mokhoa oa ho qoba liphoso tse fapaneng molemong oa sebopeho sa PCB sa liboto tse hatisitsoeng

FIG. 5. PCB cross section used to estimate parasitic effects on through-hole structures

The parasitic inductance often has a great influence on the connection of bypass capacitors. Li-capacitor tse loketseng tse fetang li fana ka lipotoloho tse khuts’oane tsa maqhubu a phahameng lipakeng tsa sebaka sa phepelo le sebopeho, empa masoba a sa sebetseng hantle a ka ama tsela e nang le kutlo e tlase pakeng tsa sebopeho le sebaka sa phepelo. A typical PCB through hole (d = 10 mil, h = 62.5 mil) is approximately equivalent to a 1.34nH inductor. Ha ho fanoa ka maqhubu a ikhethileng a ts’ebetso ea sehlahisoa sa ISM-RF, masoba a phunyeletsang a ka ama lipotoloho tse bobebe joalo ka lisekete tsa li-resonant kanale le li-network tse tsamaellanang.

Mathata a mang a hlaha haeba lipotoloho tse bobebe li arolelana masoba, joalo ka matsoho a mabeli a netweke ea mofuta oa.. Mohlala, ka ho beha sekoti se loketseng se lekanang le ho kenya tšebetsong ha lumped, sekema se lekanang se fapane hole le moralo oa potoloho oa mantlha (FIG. 6). As with crosstalk of common current path 3, resulting in increased mutual inductance, increased crosstalk and feed-through.

How to avoid PCB design problems

Setšoantšo sa 6. Meaho e loketseng khahlanong le meralo e seng e loketseng, ho na le “litsela tsa matšoao” tse ka bang teng potolohong.

To sum up, circuit layout should follow the following principles:

Ensure modeling of through-hole inductance in sensitive areas.

The filter or matching network uses independent through-holes.

Note that a thinner PCB copper-clad will reduce the effect of parasitic inductance through the hole.

Bolelele ba lead

Lintlha tsa sehlahisoa sa Maxim ISM-RF hangata li khothaletsa ho sebelisa kenyelletso e khuts’oane haholo ea maqhubu a phahameng le tlhahiso e lebisa ho fokotsa tahlehelo le radiation. Ka lehlakoreng le leng, tahlehelo e joalo hangata e bakoa ke mekhahlelo e seng e loketseng ea likokoana-hloko, ka hona, ts’oaetso ea parasitic le capacitance li ama sebopeho sa potoloho, mme ho sebelisa lead e khuts’oane haholo ho thusa ho fokotsa mekhahlelo ea likokoana-hloko. Typically, a 10 mil wide PCB lead with a distance of 0.0625in… From a FR4 board produces an inductance of approximately 19nH/in and a distributed capacitance of approximately 1pF/in. Bakeng sa potoloho ea LAN / mixer e nang le inductor ea 20nH le 3pF capacitor, boleng ba karolo e sebetsang bo tla ameha haholo ha potoloho le sebopeho sa likarolo li le thata haholo.

Ipc-d-317a4 in ‘Institute for Printed Circuits’ provides an industry standard equation for estimating various impedance parameters of microstrip PCB. Tokomane ena e ile ea nkeloa sebaka ke 2003 ke IPC-2251 5, e fanang ka mokhoa o nepahetseng oa ho bala bakeng sa litsamaiso tse fapaneng tsa PCB. Online calculators are available from a variety of sources, most of which are based on equations provided by IPC-2251. The Electromagnetic Compatibility Lab at Missouri Institute of Technology provides a very practical method for calculating PCB lead impedance 6.

The accepted criteria for calculating the impedance of microstrip lines are:

Ka foromo, εr ke khaello ea dielectric ea dielectric, h ke bophahamo ba lead ho tloha stratum, W ke bophara ba lead, mme T ke botenya ba lead (FIG. 7). Ha w / h e le lipakeng tsa 0.1 le 2.0 le εr e lipakeng tsa 1 le 15, liphetho tsa lipalo tsa foromo ena li nepahetse.

Figure 7. This figure is a PCB cross section (similar to Figure 5) and represents the structure used to calculate the impedance of a microstrip line.

In order to evaluate the effect of lead length, it is more practical to determine the detuning effect of ideal circuit by lead parasitical parameters. Mohlala ona, re bua ka ho kheloha matla le ho hloka matla. The standard equation of characteristic capacitance for microstrip lines is:

Ka mokhoa o ts’oanang, phallo ea litšobotsi e ka baloa ho tsoa ho equation ka ho sebelisa equation e kaholimo:

Mohlala, nahana ka botenya ba PCB ea 0.0625in. (H = 62.5 mil), lead e le ‘ngoe e koahetsoeng ka koporo (t = 1 mil), 1.35in. (w = 0.01 mil), le boto ea FR-10. Hlokomela hore ε R ea FR-4 ka tloaelo ke 4.35 farad / m (F / m), empa e ka tloha ho 4.0F / m ho isa ho 4.7F / m. Li-eigenvalue tse baloang mohlaleng ona ke Z0 = 134 ω, C0 = 1.04pF / in, L0 = 18.7nH / in.

Bakeng sa moralo oa AN ISM-RF, bolelele ba li-lead tsa 12.7mm (0.5in) botong bo ka hlahisa mekhahlelo ea likokoana-hloko tse ka bang 0.5pF le 9.3nH (Setšoantšo sa 8). Phello ea mekhahlelo ea likokoana-hloko boemong bona ho kanale ea resonant ea seamohedi (phapang ea sehlahisoa sa LC) e ka baka phapang ea 315MHz ± 2% kapa 433.92mhz ± 3.5%. Ka lebaka la matla le tlatsetso e eketsehileng e bakiloeng ke phello ea likokoana-hloko ea lead, tlhoro ea maqhubu a 315MHz oscillation a fihla ho 312.17mhz, mme tlhoro ea maqhubu a oscillation a 433.92mhz a fihla ho 426.6mhz.

Another example is the resonant channel of Maxim’s superheterodyne receiver (MAX7042). The recommended components are 1.2pF and 30nH at 315MHz; At 433.92MHz, it is 0pF and 16nH. Bala palo ea maqhubu a potoloho ea potoloho ka ho sebelisa equation:

Tekolo ea potoloho e nang le molumo oa poleiti e lokela ho kenyelletsa litlamorao tsa parasitic tsa sephutheloana le sebopeho, mme mekhahlelo ea likokoana-hloko ke 7.3PF le 7.5PF ka ho latellana ha ho baloa maqhubu a 315MHz a nang le molumo. Hlokomela hore sehlahisoa sa LC se emela lumped capacitance.

Ho akaretsa, ho tlameha ho lateloa metheo e latelang:

Etsa hore moetapele o be mokhutšoanyane kamoo ho ka khonehang.

Beha lipotoloho tsa senotlolo haufi le sesebelisoa kamoo ho ka khonehang.

Likarolo tsa bohlokoa li lefelloa ho latela sebopeho sa parasitism.

Phekolo e thehang le e tlatsang

The grounding or power layer defines a common reference voltage that supplies power to all parts of the system through a low resistance path. Ho lekanya masimo ohle a motlakase ka tsela ena ho hlahisa mokhoa o motle oa ho itšireletsa.

Direct Direct e lula e phalla tseleng e tlase ea ho hanyetsa. Ka mokhoa o ts’oanang, maqhubu a phahameng a hona joale a phalla ka tsela e nang le khanyetso e tlase haholo. So, for a standard PCB microstrip line above the formation, the return current tries to flow into the ground region directly below the lead. As described in the lead coupling section above, the cut ground area introduces various noises that increase crosstalk either through magnetic field coupling or by converging currents (Figure 9).

Mokhoa oa ho qoba liphoso tse fapaneng molemong oa sebopeho sa PCB sa liboto tse hatisitsoeng

FIG. 9. Keep the formation intact as much as possible, otherwise the return current will cause crosstalk.

Filled ground, also known as guard lines, is commonly used in circuits where continuous grounding is difficult to lay or where shielding sensitive circuits is required (FIG. 10). The shielding effect can be increased by placing grounding holes (i.e. hole arrays) at both ends of the lead or along the lead. 8. Se ke oa kopanya terata ea molebeli le loto e etselitsoeng ho fana ka tsela ea morao-rao ea ho khutla. Tokisetso ena e ka hlahisa crosstalk.

Mokhoa oa ho qoba liphoso tse fapaneng molemong oa sebopeho sa PCB sa liboto tse hatisitsoeng

FEIE. 10. Moralo oa sistimi ea RF o lokela ho qoba lithapo tse koahetsoeng tsa koporo, haholoholo ha ho hlokahala sheathing ea koporo.

Sebaka se koahetsoeng ka koporo ha sea thehoa (se phaphametse) kapa ha sea theoa feela ntlheng e le ‘ngoe, e leng se sitisang tšebetso ea sona. In some cases, it can cause unwanted effects by forming parasitic capacitance that changes the impedance of the surrounding wiring or creates a “latent” path between circuits. Ka bokhutšoanyane, haeba sekotoana sa koporo se koahetsoeng (se seng sa potoloho ea wiring) se behiloe holim’a boto ea potoloho ho netefatsa botenya bo sa fetoheng. Libaka tse apereng koporo li lokela ho qojoa kaha li ama moralo oa potoloho.

Kamora nako, etsa bonnete ba hore o nahana ka litlamorao tsa sebaka se seng le se seng sa lefatše haufi le lenakana. Lenakana lefe kapa lefe la monopole le tla ba le sebaka sa mobu, likhoele le masoba e le karolo ea tekano ea sistimi, ‘me wiring e sa lekanang hantle e tla ama ts’ebetso ea radiation le tataiso ea antenna (template ea radiation). Therefore, the ground area should not be placed directly below the monopole PCB lead antenna.

To sum up, the following principles should be followed:

Fana ka libaka tse sa khaotseng le tse tlase tsa ho emisa hohle kamoo ho ka khonehang.

Likarolo ka bobeli tsa mohala oa ho tlatsa li thehiloe, ‘me ho sebelisoa sekoti se phunyeletsang hohle kamoo ho ka khonehang.

U se ke ua phaphamala terata e koahetsoeng ka koporo haufi le potoloho ea RF, u se ke oa beha koporo ho potoloha potoloho ea RF.

Haeba boto ea potoloho e na le likarolo tse ngata, ho molemo ho beha mobu ka lesoba ha thapo ea lets’oao e feta ka lehlakoreng le leng.

Ho feteletseng kristale capacitance

Parasitic capacitance will cause the crystal frequency to deviate from the target value 9. Ka hona, litataiso tse akaretsang li lokela ho lateloa ho fokotsa matla a khelohileng a lithakhisa tsa kristale, lipads, likhoele, kapa likhokelo ho lisebelisoa tsa RF.

The following principles should be followed:

Khokahano lipakeng tsa kristale le sesebelisoa sa RF e lokela ho ba khuts’oane kamoo ho ka khonehang.

Keep the wiring from each other as far as possible.

Haeba matla a likokoana-hloko a shunt a le maholo haholo, tlosa sebaka se katiloeng ka tlasa kristale.

Planar wiring inductance

Planar wiring or PCB spiral inductors are not recommended. Typical PCB manufacturing processes have certain inaccuracies, such as width and space tolerances, which greatly affect the accuracy of component values. Therefore, most controlled and high Q inductors are wound type. Taba ea bobeli, o ka khetha li-ceramic inductor tse ngata tse fapaneng, bahlahisi ba li-multilayer chip capacitor le bona ba fana ka sehlahisoa sena. Leha ho le joalo, baqapi ba bang ba khetha li-induction inductor ha ba tlameha. The standard formula for calculating planar spiral inductance is usually Wheeler’s formula 10:

Moo, a ke radius e tloaelehileng ea kela, ka lisenthimithara; N ke palo ea makhetlo; C ke bophara ba coil core (router-rinner), ka lisenthimithara. Ha kela c “0.2a 11, ho nepahala ha mokhoa oa lipalo ho ka tlase ho 5%.

Ho ka sebelisoa li-inductor tse nang le lera le le leng la lisekoere, tse mahlakore a mane, kapa libopeho tse ling. Ho ka fumanoa likhakanyo tse ntle haholo bakeng sa ho etsa moralo oa polane ho li-wafers tse kopaneng tsa potoloho. Bakeng sa ho fihlela sepheo sena, foromo e tloaelehileng ea Wheeler e fetotsoe ho fumana mokhoa oa ho lekanya lifofane o loketseng boholo bo nyane le boholo ba lisekoere 12.

Moo, ρ ke karolelano ea ho tlatsa :; N ke palo ea linako, ‘me dAVG ke bophara bo karolelano :. Bakeng sa lirethe tsa lisekoere, K1 = 2.36, K2 = 2.75.

Ho na le mabaka a mangata a ho qoba ho sebelisa mofuta ona oa li-inductor, o atisang ho baka ho fokotseha ha boleng ba boipheliso ka lebaka la meeli ea sebaka. The main reasons for avoiding planar inductors are limited geometry and poor control of critical dimensions, which makes it impossible to predict inductor values. Ntle le moo, ho thata ho laola litheko tsa inductance nakong ea tlhahiso ea PCB, mme inductance e boetse e tloaetse ho baka lerata ho likarolo tse ling tsa potoloho.