Mena i tenei wa mohio, i tenei waahanga, kei te hiahia koe ki te whai pukenga i roto i te FPGA, katahi ka whakarerea koe e te ao, ka whakarerea koe e te Times.

Nga whakaaro mo te punaha tere-tere PCB design related to serdes applications are as follows:

(1) Microstrip and Stripline wiring.

Ko nga raina miihini kei te taatai ​​i te papa tohu o waho o te rererangi tohutoro (GND, Vcc ranei) ka wehea e nga papaaho hiko hei whakaiti i nga takaroa; Ko nga waea rīpene ka nekehia ki roto i te papa tohu o roto i waenga i nga rererangi tohutoro e rua (GND me te Vcc) mo te kaha ake o te kawenga kaha, te aukati ngawari me te tohu maamaa, penei i te ahua.

Ko te raina miihiniiti me te raina Unuhia he pai ake mo nga waea waea

(2) waea tere tohu rerekee tere-tere.

Ko nga tikanga waea waea noa mo te tere tere rerekee tohu takirua he miihini Tihi Taapiri (paparanga runga), raina taapiri Tihi Tae (paparanga tohu whakauru, he pai mo te tere tere tere SERDES takirua tohu tohu) me te Broadside Taputapu miihiniiti, e whakaaturia ana i te ahua.

High speed differential signal pair wiring

(3) bypass capacitance (BypassCapacitor).

Bypass capacitor is a small capacitor with very low series impedance, which is mainly used to filter high frequency interference in high speed conversion signals. E toru nga momo pehanga hipa e whakamahia ana i te punaha FPGA: punaha tere-tere (100MHz ~ 1GHz) e whakamahia whanui ana nga pehanga hiko mai i te 0.01nF ki te 10nF, ka tohaina i roto i te 1cm mai i te Vcc; Te punaha tere-tere (neke atu i te tekau MHZ 100MHz), ko te kohinga puranga noa ko te 47nF ki te 100nF tantalum capacitor, te tikanga kei roto i te 3cm o Vcc; Te punaha tere-iti (iti iho i te 10 MHZ), ko te kohinga paahiko e whakamahia whanui ana ko 470nF ki te 3300nF capacitor, ko te whakatakotoranga kei runga i te PCB he koreutu noa.

(4) Raukaha waea pai.

Capacitor wiring can follow the following design guidelines, as shown.

Raukura pai arotau

Capacitive pin pads are connected using large size through holes (Via) to reduce coupling reactance.

Use a short, wide wire to connect the pad of the capacitor pin to the hole, or directly connect the pad of the capacitor pin to the hole.

LESR capacitors (Low Effective Series Resistance) were used.

Me hono ia pine GND, poka ranei, ki te papa rererangi o te whenua.

(5) Key points of high-speed system clock wiring.

Aukati i te awhiowhio zigzag me nga karaka ara kia tika tonu.

Ngana ki te ara i roto i te papa tohu kotahi.

Kaua e whakamahia te kohao-nui, na te mea-poka ka uru mai te whakaata kaha me nga aarai koretake.

Whakamahia nga waea waea miihiniiti i te papa o runga kia taea ki te karo i te whakamahinga o nga kohao me te whakaiti i te roa o te tohu.

Whakanohia te papa rererangi ki te taha o te papa tohu karaka kia taea ai te whakaiti i te haruru me te kopata. Mena ka whakamahia he papa tohu a roto, ka taea te whiti i te papa tohu karaka i waenga i nga rererangi whenua e rua hei whakaiti i te haruru me te aukatinga. Shorten signal delay.

Ko te tohu karaka kia tika te whakaoho.

(6) Nga mea e tika ana kia aro atu ki te hononga tere-tere o te punaha me nga waea waea.

Note the impedance matching of the differential signal.

Kia mahara ki te whanui o te raina tohu rerekee ka taea e ia te aro ki te 20% o te piki ake o te tohu, o te waa hinga ranei.

Me nga honohono e tika ana, ko te auau toharite o te honohono kia tutuki i te waa teitei o te hoahoa.

Edge-couple coupling should be used as far as possible to avoid broadside-couple coupling, 3S fractional rule should be used to avoid over-coupling or crossword.

(7) Tuhipoka mo te taatari haruru mo nga punaha tere-tere.

Whakaitihia te aukatinga o te auau iti (kei raro iho o te 1KHz) na te haruru o te puna hiko, ka taapiri te whakangungu rakau, te ara taatai ​​ranei i ia pito whakauru mana.

Taapirihia he taapiri hiko hiko 100F i ia waahi ka uru te mana ki te PCB.

Hei whakaiti i te haruru auau-nui, whakanohohia te maha o nga miihini whakaheke i ia Vcc me te GND ka taea.

Whakaritehia nga rererangi Vcc me te GND kia rite, wehehia ki nga dielectrics (penei i te FR-4PCB), ka whakatakoto i nga pehanga hiko ki etahi atu papa.

(8) High speed system Ground Bounce

Ngana ki te taapiri i te miihini whakaheke ki ia takirua tohu Vcc / GND.

Ka whakauruhia he Buffer o waho ki te pito whakaputa o nga tohu whakatere tere-tere penei i nga porotiti hei whakaiti i te hiahia mo te taraiwa taraiwa.

Ko te ahua Tere Tere (iti-maranga-heke) i whakatauhia mo nga tohu whakaputa kaore e hiahiatia te tere tere.

Control load reactance.

Whakaitihia te tohu takahuri karaka, tohaina ranei kia rite ki te huringa o te maramara.

Ko te tohu e huripokina ana e tata ana ki te pine GND o te maramara ka taea.

Ko te hoahoanga o te ara iahiko takahuri kia karo i te hokinga o te putanga.

Ko te rereketanga o te hiko hiko me te papa ka uru ki te whakauru katoa.