If in this intelligent age, in this field, you want to have a skill in FPGA, then the world will abandon you, The Times will abandon you.

Ukucatshangelwa kohlelo lwejubane eliphezulu PCB design related to serdes applications are as follows:

(1) Microstrip and Stripline wiring.

Imigqa ye-Microstrip i-wiring ngaphezulu kwesendlalelo sesiginali yangaphandle yendiza eyisithenjwa (i-GND noma i-Vcc) ehlukaniswe yimidiya kagesi ukunciphisa ukubambezeleka; Izintambo zeribhoni zihanjiswa kusendlalelo sesiginali yangaphakathi phakathi kwezindiza ezimbili eziyizethenjwa (i-GND noma i-Vcc) ukuze zisebenze ngamandla amakhulu, kube lula ukulawula imedance kanye nesiginali ehlanzekile, njengoba kukhonjisiwe emfanekisweni.

Umugqa weMicrostrip nomugqa wokuhlwaya kungcono kakhulu ezintanjeni

(2) izintambo zesiginali esezingeni eliphezulu ezahlukile.

Izindlela ezivamile zokuhlanganisa izintambo zombhangqwana wamasignali ahlukaniswa ngesivinini esikhulu zifaka i-Edge Coupled microstrip (ungqimba ophezulu), umugqa webhebhoni ohlanganiswe nge-Edge (ungqimba lwesiginali eshumekiwe, efanelekile ngebhangqa lesiginali esisezingeni eliphakeme le-SERDES) kanye ne-Broadside Coupled microstrip, njengoba kukhonjisiwe esithombeni.

High speed differential signal pair wiring

(3) bypass capacitance (BypassCapacitor).

Bypass capacitor is a small capacitor with very low series impedance, which is mainly used to filter high frequency interference in high speed conversion signals. Kunezinhlobo ezintathu zama-bypass capacitors asetshenziswa kakhulu ohlelweni lwe-FPGA: uhlelo lwejubane eliphezulu (100MHz ~ 1GHz) oluvame ukusetshenziswa ama-bypass capacitors kusuka ku-0.01nF kuye ku-10nF, okusatshalaliswa ngokubanzi ngaphakathi kwe-1cm kusuka ku-Vcc; Isivinini esiphakathi nendawo (ngaphezu kweshumi se-MHZ 100MHz), ibanga elijwayelekile lokudlula i-capacitor lingu-47nF ukuya ku-100nF tantalum capacitor, imaphakathi kwe-3cm ye-Vcc; Isistimu enejubane eliphansi (ngaphansi kuka-10 MHZ), ibanga elisetshenziswa kakhulu lokudlula i-capacitor lingu-470nF kuye ku-3300nF capacitor, ukwakheka ku-PCB kukhululekile.

(4) I-Capacitance intambo efanelekile.

Capacitor wiring can follow the following design guidelines, as shown.

Izintambo ezilungile ezinamandla

Capacitive pin pads are connected using large size through holes (Via) to reduce coupling reactance.

Use a short, wide wire to connect the pad of the capacitor pin to the hole, or directly connect the pad of the capacitor pin to the hole.

LESR capacitors (Low Effective Series Resistance) were used.

Iphini noma imbobo ngayinye ye-GND kufanele ixhunywe endizeni yomhlaba.

(5) Key points of high-speed system clock wiring.

Gwema amazombe amazombezombe namawashi womzila aqonde ngangokunokwenzeka.

Zama ukuhambisa kumugqa owodwa wesiginali.

Musa ukusebenzisa izimbobo ezinqamula ngangokunokwenzeka, ngoba izimbobo ezizokwethula izokwethula ukucabanga okuqinile nokungafani kahle kwe-impedance.

Use microstrip wiring in the top layer as much as possible to avoid the use of holes and minimize signal delay.

Beka indiza yasemhlabeni eduze kocingo lwesiginali yewashi ngangokunokwenzeka ukuze unciphise umsindo ne-crosstalk. Uma kusetshenziswa ungqimba wesiginali yangaphakathi, ungqimba lwesiginali yewashi lungabekwa phakathi kwezindiza ezimbili zomhlaba ukunciphisa umsindo nokuphazamiseka. Shorten signal delay.

Isiginali yewashi kufanele ifaniswe kahle ne-impedance.

(6) Izindaba ezidinga ukunakekelwa kusistimu yejubane elihlangana nokuxhuma izintambo.

Note the impedance matching of the differential signal.

Note the width of the differential signal line so that it can tolerate 20% of the signal rise or fall time.

Ngezixhumi ezifanele, imvamisa elinganisiwe yesixhumi kufanele ihlangabezane nemvamisa ephezulu kakhulu yomklamo.

Edge-couple coupling should be used as far as possible to avoid broadside-couple coupling, 3S fractional rule should be used to avoid over-coupling or crossword.

(7) Amanothi wokuhlunga umsindo wezinhlelo ezisheshayo.

Nciphisa ukuphazamiseka kwemvamisa ephansi (ngezansi kwe-1KHz) okubangelwa umsindo womthombo wamandla, bese ufaka isekhethi lokuvikela noma lokuhlunga ekugcineni komthombo wamandla wokufinyelela ngamunye.

Faka isihlungi se-100F se-electrolytic capacitor endaweni ngayinye lapho ugesi ungena khona ku-PCB.

Ukwehlisa umsindo wefrikhwensi ephezulu, beka ama-capacitors amaningi wokuqeda ku-Vcc ne-GND ngayinye ngangokunokwenzeka.

Beka izindiza ze-Vcc ne-GND ngokufana, uzihlukanise nama-dielectric (njenge-FR-4PCB), bese ubeka ama-capacitors okudlula kwezinye izingqimba.

(8) High speed system Ground Bounce

Zama ukwengeza i-decoupling capacitor kumbhangqwana ngamunye wesiginali ye-Vcc / GND.

Kwengezwa iBuffer yangaphandle ekugcineni kokukhishwa kwezimpawu ezisheshayo zokuguqula izinto ezinjengezinto zokubala ukunciphisa imfuneko yamandla okushayela.

Imodi yeSlow Slew (low-kupanda-slope) ibekelwe amasiginali wokukhipha angadingi isivinini esinzima.

Control load reactance.

Nciphisa isignali ephenya iwashi, noma uyihambise ngokulingana ngangokunokwenzeka ku-chip.

Isiginali epheqa njalo isondele kuphini we-GND we-chip ngangokunokwenzeka.

Idizayini yesekethe yesikhathi ehambisanayo kufanele igweme ukuhlehliswa kokukhipha ngokushesha.

Ukuphambukisa amandla kagesi kanye nomhlabathi kungadlala indima ekungenisweni ngokuphelele.