How to avoid PCB design mistakes?

Gawo lowonjezera deta

1. Kaya chidziwitso chomwe chidalandilidwa ndichokwanira (kuphatikiza chithunzithunzi. Fayilo ya BRD, mndandanda wazinthu, PCB kapangidwe ka kapangidwe ndi kapangidwe ka PCB kapena zosintha pakusintha, malingaliro amachitidwe ndi kapangidwe kake kapangidwe kake)

ipcb

2. Onetsetsani kuti template ya PCB ili yatsopano

3. Ensure that the positioning components of the template are correctly located

4.PCB design description and PCB design or change requirements, standardization requirements are clear

5. Onetsetsani kuti zida zoletsedwa ndi malo oyikapo waya pazithunzi za autilaini zikuwonetsedwa pa template ya PCB

6. Yerekezerani zojambula za autilaini kuti mutsimikizire kuti kukula kwake ndi kulolerana komwe kumayikidwa pa PCB ndikolondola, ndikutanthauzira kwa dzenje lazitsulo ndi dzenje losasunthika ndikolondola

7. Pambuyo kutsimikizira kulondola kwa template ya PCB, ndibwino kuti mutseke fayiloyo kuti musasunthike posagwirizana

Chachiwiri, pambuyo poyang’ana masanjidwe

A. Fufuzani zigawo zikuluzikulu

8. Tsimikizani ngati mapaketi azida zonse akugwirizana ndi laibulale yogwirizana ya kampaniyo komanso ngati laibulale ya phukusi yasinthidwa (onani zotsatira zake ndi viewlog). Ngati sichoncho, Sinthani Zizindikiro

9. bolodi laling’ono ndi bolodi la amayi siziyenera kusokoneza

10. Kaya zigawo zake zimayikidwa 100%

11. Open place-bound for the TOP and BOTTOM layers of the device to see if DRC caused by overlap is allowed

12. Kaya mfundo ya Mark ndiyokwanira komanso yofunikira

13. Zolemera zigawo ziyenera kuikidwa pafupi ndi malo othandizira a PCB kapena mbali yothandizira kuti muchepetse nkhondo ya PCB

14. Ndikofunika kutseka zida zokhudzana ndi kapangidwe kake zitakonzedwa kuti zisawonongeke kusunthika posunthira malowo

15. Within 5mm around the crimping socket, the front side is not allowed to have components whose height exceeds the height of the crimping socket, and the back side is not allowed to have components or solder joints

16. Tsimikizani ngati masanjidwewo akukwaniritsa zofunikira zaukadaulo (yang’anani pa BGA, PLCC ndi socket patch)

17, zitsulo za zipolopolo zachitsulo, samalani kwambiri kuti musagundane ndi zinthu zina, kusiya malo okwanira

18. Zida zokhudzana ndi mawonekedwe ziyenera kuyikidwa pafupi ndi mawonekedwe, ndipo woyendetsa basi woyenda kumbuyo akuyenera kuyikidwa pafupi ndi cholumikizira kumbuyo

19. Kaya chipangizo cha CHIP chomwe chili pamtunda chasungunuka chasandulika kukhala phukusi la soldering,

20. Whether there are more than 50 manual solder joints

21. Kukweza kopingasa kuyenera kuganiziridwa pakukhazikitsa ma axial pazigawo zapamwamba pa PCB. Leave room for sleeping. Ndipo ganizirani njira yokhazikika, monga kristalo yokhazikika

22. Onetsetsani kuti pali malo okwanira pakati pazipangizazi pogwiritsa ntchito choziziritsira ndi zida zina, ndipo muthane ndi kutalika kwa zida zazikuluzikulu mkati mwazitsime zotenthetsera

B. Ntchito yowunika

23. Whether the layout of digital circuit and analog circuit components of the digital-analog hybrid board has been separated, and whether the signal flow is reasonable

Zosintha 24, A / D zimayikidwa pamagawo a analog.

25, clock device layout is reasonable

26. Whether the layout of high-speed signal devices is reasonable

27, ngati chida chonyamuliracho chidayikidwa bwino (gwero lofananira ndi magwero liyenera kuyikidwa kumapeto kwa mayendedwe; Chingwe chofananira chapakati chimayikidwa pakatikati; Kutha kwakanthawi kofananira kuyenera kuyikidwa kumapeto kwa chizindikirocho)

28. Kaya kuchuluka ndi kupezeka kwama decoupling capacitors azida za IC ndizovomerezeka

29. Mizere yama siginecha imatenga ndege zam’magulu osiyanasiyana ngati ndege zolozera. Mukamaoloka dera logawanika ndi ndege, kaya kulumikizana kwa capacitorance pakati pa ndege zowunikirako kuli pafupi ndi dera loyendetsa mayendedwe.

30. Kaya masanjidwe oyang’anira dera ndiwolozeka komanso oyenera kugawanika

31. Kaya fuseti yamagetsi yama board imayikidwa pafupi ndi cholumikizira ndipo palibe gawo loyendetsa kutsogolo kwake

32. Tsimikizani kuti ma siginolo olimba ndi ma signal ofooka (magetsi 30dB) amasanjidwa padera

33. Kaya zida zomwe zingakhudze zoyeserera za EMC zimayikidwa molingana ndiupangiri wa kapangidwe kake kapena kutengera zochitika zabwino. Mwachitsanzo: dera lokonzanso lokha liyenera kukhala pafupi ndi batani lokonzanso

C. malungo

34, pazinthu zosazindikira kutentha (kuphatikiza madzi apakatikati capacitance, kugwedezeka kwa kristalo) momwe zingathere kutali ndi zida zamagetsi zazikulu, rediyeta ndi zina zotentha

35. Kaya masanjidwewo amakwaniritsa zofunikira za kapangidwe ka matenthedwe ndi njira zodziwitsira kutentha (malinga ndi momwe mapangidwe amapangidwe)

D. mphamvu

36. Onani ngati magetsi a IC ali kutali kwambiri ndi IC

37. Kaya masanjidwe a LDO ndi madera ozungulira ndiwololera

38. Is the circuit layout around the module power supply reasonable

39. Kodi dongosolo la magetsi ndilabwino?

Makonda a Rule

40. Onani ngati zovuta zonse zoyesezera zawonjezeredwa moyenera ku Constraint Manager

41. Kodi malamulo azakuthupi ndi zamagetsi amakhazikitsidwa molondola (zopinga zolembedwa zamagetsi zamagetsi ndi netiweki zapansi)

42. Kaya mtunda pakati pa Test Via ndi Test Pin ndi wokwanira

43. Kaya makulidwe a lamination ndi chiwembuchi amakwaniritsa zofunikira pakupanga ndi kukonza

44. Kaya kutalika kwa mizere yonse yosiyanitsidwa ndi zofunikira za impedance kwawerengedwa ndikuwongoleredwa ndi malamulo