Technical characteristics and design challenges of through holes in any layer

In recent years, in order to meet the needs of miniaturization of some high-end consumer electronic products, the chip integration is getting higher and higher, the BGA pin spacing is getting closer and closer (less than or equal to 0.4pitch), the PCB layout is becoming more and more compact, and the routing density is becoming larger and larger. Anylayer (arbitrary order) technology is applied in order to improve the design throughput without affecting the performance such as signal integrity, This is the ALIVH any layer IVH structure multilayer printed wiring board.
Technical characteristics of any layer through hole
Compared with the characteristics of HDI technology, the advantage of ALIVH is that the design freedom is greatly increased and holes can be punched freely between layers, which can not be achieved by HDI technology. Generally, domestic manufacturers achieve a complex structure, that is, the design limit of HDI is the third-order HDI board. Because HDI does not completely adopt laser drilling, and the buried hole in the inner layer adopts mechanical holes, the requirements of hole disc are much larger than laser holes, and the mechanical holes occupy the space on the passing layer. Therefore, generally speaking, compared with the arbitrary drilling of ALIVH technology, the pore diameter of the inner core plate can also use 0.2mm micropores, which is still a big gap. Therefore, the wiring space of ALIVH board is probably much higher than that of HDI. At the same time, the cost and processing difficulty of ALIVH are also higher than that of HDI process. As shown in Figure 3, it is a schematic diagram of ALIVH.
Design challenges of vias in any layer
Arbitrary layer via technology completely subverts the traditional via design method. If you still need to set vias in different layers, it will increase the difficulty of management. The design tool needs to have the ability of intelligent drilling, and can be combined and split at will.
Cadence adds the wiring replacement method based on working layer to the traditional wiring method based on wire replacement layer, as shown in Figure 4: you can check the layer that can carry out loop line in the working layer panel, and then double-click the hole to select any layer for wire replacement.
Example of ALIVH design and plate making:
10 storey ELIC design
OMAP4 Platform
Buried resistance, buried capacity and embedded components
High integration and miniaturization of handheld devices are required for high-speed access to the Internet and social networks. Currently rely on 4-n-4 HDI technology. However, in order to achieve higher interconnection density for the next generation of new technology, in this field, embedding passive or even active parts into PCB and substrate can meet the above requirements. When you design mobile phones, digital cameras and other consumer electronic products, it is the current design choice to consider how to embed passive and active parts into PCB and substrate. This method may be slightly different because you use different suppliers. Another advantage of embedded parts is that the technology provides intellectual property protection against so-called reverse design. Allegro PCB editor can provide industrial solutions. Allegro PCB editor can also work more closely with HDI board, flexible board and embedded parts. You can get the correct parameters and constraints to complete the design of embedded parts. The design of embedded devices can not only simplify the process of SMT, but also greatly improve the cleanliness of products.
Buried resistance and capacity design
Buried resistance, also known as buried resistance or film resistance, is to press the special resistance material on the insulating substrate, then obtain the required resistance value through printing, etching and other processes, and then press it together with other PCB layers to form a plane resistance layer. The common manufacturing technology of PTFE buried resistance multilayer printed board can achieve the required resistance.
The buried capacitance uses the material with high capacitance density and reduces the distance between layers to form a large enough inter plate capacitance to play the role of decoupling and filtering of the power supply system, so as to reduce the discrete capacitance required on the board and achieve better high-frequency filtering characteristics. Because the parasitic inductance of buried capacitance is very small, its resonant frequency point will be better than ordinary capacitance or low ESL capacitance.
Due to the maturity of process and technology and the need of high-speed design for power supply system, buried capacity technology is applied more and more. Using buried capacity technology, we first have to calculate the size of flat plate capacitance Figure 6 flat plate capacitance calculation formula
Of which:
C is the capacitance of buried capacitance (plate capacitance)
A is the area of flat plates. In most designs, it is difficult to increase the area between flat plates when the structure is determined
D_ K is the dielectric constant of the medium between plates, and the capacitance between plates is directly proportional to the dielectric constant
K is vacuum permittivity, also known as vacuum permittivity. It is a physical constant with a value of 8.854 187 818 × 10-12 farad / M (F / M);
H is the thickness between planes, and the capacitance between plates is inversely proportional to the thickness. Therefore, if we want to obtain a large capacitance, we need to reduce the interlayer thickness. 3M c-ply buried capacitance material can achieve an interlayer dielectric thickness of 0.56mil, and the dielectric constant of 16 greatly increases the capacitance between plates.
After calculation, 3M c-ply buried capacitance material can achieve an inter plate capacitance of 6.42nf per square inch.
At the same time, it is also necessary to use PI simulation tool to simulate the target impedance of PDN, so as to determine the capacitance design scheme of single board and avoid the redundant design of buried capacitance and discrete capacitance. Figure 7 shows the PI simulation results of a buried capacity design, only considering the effect of inter board capacitance without adding the effect of discrete capacitance. It can be seen that only by increasing the buried capacity, the performance of the whole power impedance curve has been greatly improved, especially above 500MHz, which is a frequency band in which the board level discrete filter capacitor is difficult to work. The board capacitor can effectively reduce the power impedance.