In recent years, in order to meet the needs of miniaturization of some high-end consumer electronic products, the chip integration is getting higher and higher, the BGA pin spacing is getting closer and closer (less than or equal to 0.4pitch), the PCB layout is becoming more and more compact, and the routing density is becoming larger and larger. Anylayer (arbitrary order) technology is applied in order to improve the design throughput without affecting the performance such as signal integrity, This is the ALIVH any layer IVH structure multilayer printed wiring board.
Karakteristik teknis lapisan apa wae liwat bolongan
Compared with the characteristics of HDI technology, the advantage of ALIVH is that the design freedom is greatly increased and holes can be punched freely between layers, which can not be achieved by HDI technology. Generally, domestic manufacturers achieve a complex structure, that is, the design limit of HDI is the third-order HDI board. Because HDI does not completely adopt laser drilling, and the buried hole in the inner layer adopts mechanical holes, the requirements of hole disc are much larger than laser holes, and the mechanical holes occupy the space on the passing layer. Therefore, generally speaking, compared with the arbitrary drilling of ALIVH technology, the pore diameter of the inner core plate can also use 0.2mm micropores, which is still a big gap. Therefore, the wiring space of ALIVH board is probably much higher than that of HDI. At the same time, the cost and processing difficulty of ALIVH are also higher than that of HDI process. As shown in Figure 3, it is a schematic diagram of ALIVH.
Design challenges of vias in any layer
Arbitrary layer via technology completely subverts the traditional via design method. If you still need to set vias in different layers, it will increase the difficulty of management. The design tool needs to have the ability of intelligent drilling, and can be combined and split at will.
Cadence adds the wiring replacement method based on working layer to the traditional wiring method based on wire replacement layer, as shown in Figure 4: you can check the layer that can carry out loop line in the working layer panel, and then double-click the hole to select any layer for wire replacement.
Example of ALIVH design and plate making:
Desain ELIC 10 lantai
Platform OMAP4
Resistensi dikubur, kapasitas kakubur lan komponen ditempelake
Integrasi dhuwur lan miniaturisasi piranti genggam dibutuhake kanggo akses cepet menyang Internet lan jaringan sosial. Saiki gumantung karo teknologi HDI 4-n-4. Nanging, kanggo nggayuh kerapatan interkoneksi sing luwih dhuwur kanggo teknologi anyar generasi sabanjure, ing lapangan iki, masang bagean pasif utawa malah aktif menyang PCB lan substrat bisa nyukupi sarat ing ndhuwur. Nalika ngrancang ponsel, kamera digital lan produk elektronik konsumen liyane, sampeyan dadi pilihan desain saiki kanggo nimbang cara masang bagean pasif lan aktif menyang PCB lan landasan. Cara iki bisa uga rada beda amarga sampeyan nggunakake macem-macem panyedhiya. Keuntungan liyane saka bagean sing ditempelake yaiku teknologi kasebut nyedhiyakake perlindungan properti intelektual saka desain sing diarani mbalikke. Editor Allegro PCB bisa menehi solusi industri. Editor Allegro PCB uga bisa digunakake kanthi luwih raket karo papan HDI, papan fleksibel lan bagean sing ditempelake. Sampeyan bisa entuk paramèter lan watesan sing bener kanggo ngrampungake desain bagean sing dipasang. Desain piranti semat ora mung bisa nyederhanakake proses SMT, nanging uga bisa nambah kebersihan produk.
Desain lan kapasitas kapasitas dikubur
Resistansi sing dikubur, uga dikenal minangka resistensi sing dikubur utawa resistensi film, yaiku pencet bahan resistensi khusus ing landasan insulasi, banjur entuk nilai resistensi sing dibutuhake liwat proses pencetakan, etsa lan proses liyane, banjur pencet bareng karo lapisan PCB liyane kanggo mbentuk lapisan resistensi pesawat. Teknologi manufaktur umum papan cetak multilayer resisten PTFE sing dikubur bisa entuk resistensi sing dibutuhake.
Kapasitas sing dikubur nggunakake bahan kanthi kapadhetan kapasitas dhuwur lan nyuda jarak ing antarane lapisan kanggo nggawe kapasitansi plate antar sing cukup gedhe kanggo muter peran decoupling lan penyaringan sistem catu daya, saéngga bisa ngatasi kapasitansi diskrit sing dibutuhake ing papan lan entuk karakteristik penyaringan frekuensi tinggi sing luwih apik. Amarga induktansi parasit kapasitansi sing disarèkaké sithik banget, titik frekuensi resonan bakal luwih apik tinimbang kapasitansi biasa utawa kapasitansi ESL sing sithik.
Amarga proses lan teknologi sing mateng lan kebutuhan desain kecepatan tinggi kanggo sistem pasokan listrik, teknologi kapasitas sing dikubur diterapake luwih akeh. Nggunakake teknologi kapasitas sing dikubur, luwih dhisik kudu ngetung ukuran kapasitansi piring rata Gambar 6 formula pitungan capacitance plate datar
Kang:
C minangka kapasitansi kapasitansi sing dikubur (capacitance plate)
A yaiku area lempengan sing rata. Ing umume desain, angel nambah area ing antarane lempengan rata yen struktur wis ditemtokake
D_ K minangka konstanta dielektrik saka medium ing antarane piring, lan capacitance antarane plate sebanding langsung karo konstanta dielektrik
K yaiku permittivitas vakum, uga dikenal minangka permittivity vakum. Yaiku konstanta fisik kanthi regane 8.854 187 818 × 10-12 farad / M (F / M);
H minangka kekandelan ing antarane bidang, lan kapasitansi ing antarane lempeng sebanding karo kekandelan. Mula, yen pengin entuk kapasitansi sing gedhe, kita kudu nyuda kekandelan interlayer. Bahan kapasitansi dikubur 3-c-ply bisa entuk kekandelan dielektrik interlayer yaiku 0.56mil, lan konstanta dielektrik 16 nambah kapasitas ing antarane piring.
Sawise ngitung, materi kapasitansi kakubur 3M c-ply bisa entuk kapasitansi antar piring 6.42nf saben inci persegi.
Sanalika, sampeyan uga kudu nggunakake alat simulasi PI kanggo simulasi target impedansi PDN, supaya bisa nemtokake skema desain kapasitansi ing papan siji lan ngindhari desain keluwih kapasitansi sing dikubur lan kapasitansi diskrit. Gambar 7 nuduhake asil simulasi PI saka desain kapasitas sing dikubur, mung ngelingi pengaruh capacitance inter board tanpa nambah efek capacitance diskrit. Bisa dingerteni yen mung kanthi nambah kapasitas sing dikubur, kinerja kabeh kurva impedansi listrik wis apik banget, luwih-luwih ing ndhuwur 500MHz, yaiku pita frekuensi ing endi kapasitor filter diskrit level papan angel digunakake. Kapasitor papan bisa nyuda impedansi listrik kanthi efektif.