I. Common errors in schematic diagrams

(2) Component out of bounds: component is not created in the center of component library diagram paper.

(3) The created project file network table can only be partially loaded into PCB: Ntiaj teb tsis tau xaiv thaum netlist tau tsim.

(4) Tsis txhob siv Annotate thaum siv tus kheej tsim cov khoom sib xyaw.

Common errors in PCB

(1) When the network is loaded, it is reported that NODE is not found a. Components in the schematic diagram use packages that are not in the PCB library; B. Components in the schematic diagram use packages with different names in the PCB library; C. Cheebtsam hauv daim duab qhia chaw siv pob nrog cov lej PIN tsis sib xws hauv PCB tsev qiv ntawv. Piv txwv li, triode: tus lej tus lej hauv SCH yog e, b, c, thiab 1,2,3 hauv PCB.

(2) Always cannot print to a page when printing

A. PCB tsev qiv ntawv tsis yog keeb kwm thaum nws tsim; B. Muaj cov cim zais sab nraud ntawm thaj tsam ntawm PCB pawg thawj coj tom qab txav thiab tig cov khoom sib xyaw rau ntau zaus. Xaiv qhia tag nrho cov cim zais, ntsaws PCB, thiab tom qab ntawd txav cov cim sab hauv.

(3) DRC kev tshaj qhia network tau muab faib ua ob peb ntu:

Qhov no qhia tau tias lub network tsis txuas nrog. Saib ntawm daim ntawv tshaj tawm thiab xaiv CONNECTED COPPER los tshawb nrhiav.

Yog tias tsim qauv nyuaj dua, sim tsis txhob siv cov thaiv tsis siv neeg.

Common mistakes in PCB manufacturing process

(1) ncoo sib tshooj a. Ua rau lub qhov hnyav, hauv qhov drilling vim muaj ntau qhov nyob hauv lub qhov uas tshwm sim los ntawm kev khawb thiab qhov puas.

B. Hauv pawg txheej txheem ntau txheej, muaj ob qho tib si txuas cov disks thiab cais cov disks nyob hauv tib txoj haujlwm, thiab pawg thawj coj coj zoo li • cais thiab txuas tsis raug.

(2) Kev siv txheej txheej duab tsis yog tus qauv a. Nws ua txhaum cov qauv tsim, xws li cov khoom tsim ua ntu ntu hauv qab, vuam txheej tsim hauv txheej TOP, ua rau tsis nkag siab.

B. There is a lot of design junk on each layer, such as broken lines, useless borders, annotations, etc.

(3) Unreasonable characters a. Characters cover SMD welds, which brings inconvenience to PCB on-off detection and component welding.

B. Cov cim me me dhau, ua rau muaj teeb meem luam ntawv, cim loj dhau los sib tshooj, nws nyuaj rau qhov txawv, dav dav font> 40 txhiab

(4) Single-sided pads set aperture a. Single-sided pads generally do not drill holes, the aperture should be designed to be zero, otherwise in the production of drilling data, the location of the hole coordinates. Special instructions should be given for drilling holes.

B. Yog tias ib leeg-ncoo ib sab yuav tsum tau muab hlais, tab sis lub qhov tsis tsim, lub software yuav kho lub ncoo raws li SMT ncoo thaum tso hluav taws xob thiab tsim cov ntaub ntawv, thiab txheej sab hauv yuav pov tseg lub ncoo cais.

(5) Draw the pad with a filling block

Txoj hauv kev no, txawm hais tias nws tuaj yeem hla DRC tshuaj xyuas, nws tsis tuaj yeem tsim cov ntaub ntawv tiv thaiv kab mob thaum lub sijhawm ua tiav, thiab lub ncoo tau npog nrog cov tshuaj tiv thaiv thiab tsis tuaj yeem txuas tau.

(6) The electric stratum is designed with both heat sink plate and signal line, and the positive and negative images are designed together, causing errors.

(7) Qhov loj sib nrug ntawm kab sib chaws me me dhau lawm

Grid line spacing < 0.3mm, hauv txheej txheem ntawm PCB kev tsim khoom, cov duab hloov txheej txheem tsim cov zaj duab xis tawg tom qab tsim, ua rau xaim tawg. Txhim kho cov txheej txheem nyuaj.

(8) The graph is too close to the outer frame

The spacing should be more than 0.2mm at least (more than 0.35mm at V-cut), otherwise the copper foil will warp and solder resist will fall off during the appearance processing. Affect the appearance quality (including the inner copper skin of the multilayer panel).

(9) The outline frame design is not clear

Ntau txheej tau tsim nrog cov thav duab, uas tsis sib xws ua ke, ua rau nyuaj rau PCB cov tuam txhab tsim khoom los txiav txim siab tias yuav tsim kab twg. Cov txheej txheem yuav tsum tsim nyob rau hauv txheej txheej txheej lossis BOARD txheej, thiab sab hauv hollowed tawm txoj haujlwm yuav tsum pom meej.

(10) Kev tsim duab tsis sib xws

When the graph electroplating, the current distribution is uneven, affecting the coating uniform, even cause warpage.

(11) Lub qhov luv luv

Ntev/dav ntawm qhov tshwj xeeb zoo li lub qhov yuav tsum yog> 2: 1, dav & gt; 1.0mm, otherwise CNC drilling machine can not process.

(12) No milling shape positioning hole is designed

Design at least 2 diameters in PCB if possible. 1.5mm qhov chaw tso.

(13) The aperture is not clearly marked

A. Aperture should be marked in metric system as far as possible and increase by 0.05. B. As far as possible to merge the aperture into a reservoir area. C. Whether the tolerance of metallized holes and special holes (such as crimping holes) is clearly marked.

(14) The inner layer of the multilayer is unreasonable

A. The heat dissipation pad is placed on the isolation belt. It may fail to connect after drilling. B. Tus qauv tsim ntawm txoj siv sib cais yog thais thiab yooj yim rau kev nkag siab yuam kev. C. The isolation belt is too narrow to accurately judge the network

(15) Design of buried blind orifice plate

The significance of design of buried blind hole plate: a. Increase the density of multilayer board by more than 30%, reduce the number of layers of multilayer board and reduce the size of b. Txhim kho PCB kev ua tau zoo, tshwj xeeb yog kev tswj hwm tus yam ntxwv tsis zoo (xaim luv, txo qhov nkag) c. Txhim kho txoj kev ywj pheej ntawm PCB tsim d. txo cov khoom siv raw thiab tus nqi, txhawb rau kev tiv thaiv ib puag ncig. Lwm tus ua rau muaj teeb meem rau kev ua haujlwm, uas feem ntau yog teeb meem ntawm tus neeg.

Tsis npaj

As the saying goes, “If a man does not plan ahead, trouble will find him. “This certainly applies to PCB design as well. Ib ntawm ntau qib uas ua rau PCB tsim qauv ua tiav yog xaiv cov cuab yeej raug. Today’s PCB design engineers can find many powerful and easy-to-use EDA suites on the market. Txhua tus nws muaj nws tus kheej lub peev xwm, qhov ua tau zoo thiab kev txwv. It should also be noted that no software is foolproof, so problems such as component packaging mismatches are bound to occur. Nws muaj peev xwm hais tias tsis muaj ib lub cuab yeej yuav ua tau raws li txhua yam koj xav tau, tab sis koj tseem yuav tsum tau ua koj qhov kev tshawb fawb ua ntej thiab sim txiav txim seb qhov twg zoo tshaj rau koj cov kev xav tau. Qee cov ntaub ntawv hauv Is Taws Nem tuaj yeem pab koj pib sai.

Kev sib txuas lus tsis zoo

While the practice of outsourcing PCB design to other vendors is becoming more common and often very cost-effective, it may not be appropriate for complex PCB designs where performance and reliability are critical. As design complexity increases, face-to-face communication between engineers and PCB designers becomes important in order to ensure accurate component layout and wiring in real time. This face-to-face communication can help save costly rework later.

Nws tseem yog qhov tseem ceeb kom caw PCB cov tuam txhab tsim khoom lag luam thaum ntxov hauv cov txheej txheem tsim. They can provide initial feedback on your design, and they can maximize efficiency based on their processes and procedures, which will save you considerable time and money in the long run. Los ntawm kev qhia lawv paub koj lub hom phiaj tsim thiab caw lawv koom nrog hauv cov theem pib ntawm PCB teeb tsa, koj tuaj yeem zam txhua yam teeb meem uas yuav muaj ua ntej cov khoom nkag mus rau hauv kev tsim khoom thiab ua kom luv lub sijhawm los ua lag luam.

Ua tsis tiav los tshuaj xyuas cov qauv thaum ntxov

Cov laug cam tsab ntawv tso cai rau koj los ua pov thawj tias koj tus qauv tsim ua haujlwm rau qhov tshwj xeeb tshwj xeeb. Prototype testing allows you to verify the functionality and quality of a PCB and its performance prior to mass production. Successful prototyping takes a lot of time and experience, but a strong test plan and a clear set of goals can shorten evaluation time and also reduce the likelihood of production-related errors. If any problems are found during prototype testing, a second test is performed on the reconfigured board. Los ntawm suav nrog cov xwm txheej muaj kev pheej hmoo siab ntxov hauv cov txheej txheem tsim, koj yuav tau txais txiaj ntsig los ntawm ntau qhov rov ua dua ntawm kev sim, txheeb xyuas txhua yam teeb meem uas yuav tshwm sim thaum ntxov, txo kev pheej hmoo, thiab ua kom ntseeg tau tias lub phiaj xwm tau ua tiav raws sijhawm.

Use inefficient layout techniques or incorrect components

Smaller, faster devices allow PCB design engineers to lay out complex designs that use smaller components to reduce footprint and place them closer together. Using technologies such as embedded discrete devices on internal PCB layers, or ball Grid array (BGA) packages with less pin spacing, will help reduce board size, improve performance, and preserve space for rework if problems occur. Thaum siv nrog cov khoom siv nrog tus lej pin siab thiab qhov sib nrug me me, nws yog ib qho tseem ceeb uas yuav tsum xaiv cov txheej txheem txheej txheem txheej txheem kom raug ntawm lub sijhawm tsim kom tsis txhob muaj teeb meem tom qab thiab txo nqi tsim khoom. Tsis tas li, nco ntsoov ua tib zoo kawm ntau yam thiab cov yam ntxwv ua tau zoo ntawm cov kev xaiv uas koj npaj yuav siv, txawm tias cov npe uas yog hloov pauv. A small change in the characteristics of a replacement component can be enough to screw up the performance of an entire design.

Tsis nco qab khaws cov ntaub ntawv tseem ceeb rau koj txoj haujlwm thaub qab. Kuv puas yuav tsum ceeb toom koj? At the very least, you should back up your most important work and other hard-to-replace files. Thaum cov tuam txhab feem ntau thim tag nrho lawv cov ntaub ntawv txhua hnub, qee lub tuam txhab me me yuav tsis ua qhov no, lossis txawm tias koj ua haujlwm hauv tsev. Today, it’s so easy and cheap to back up your data to the cloud that there’s no excuse not to back it up and store it in a secure location to protect it from theft, fire, and other local disasters.

Become a one-man island

Thaum koj yuav xav tias koj tus qauv tsim tau zoo thiab ua yuam kev tsis yog koj li, ntau zaus koj cov phooj ywg yuav pom yuam kev hauv koj tus qauv tsim uas koj tsis tau pom dua. Qee zaum, txawm tias koj paub cov ntsiab lus ntxaws ntawm tus tsim, cov neeg uas tsis tshua muaj kev cuam tshuam rau nws tuaj yeem tuaj yeem tswj hwm tus yam ntxwv zoo dua qub thiab muab kev nkag siab zoo. Regular review of your design with your peers can help spot unforeseen problems and keep your plan on track to stay within budget. Tseeb, kev ua yuam kev yog qhov tsis yooj yim sua, tab sis yog tias koj kawm los ntawm lawv, koj tuaj yeem tsim cov khoom lag luam zoo tom ntej.